PSB21373HV1.1XT Infineon Technologies, PSB21373HV1.1XT Datasheet - Page 31
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PSB21373HV1.1XT
Manufacturer Part Number
PSB21373HV1.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21373HV1.1XT.pdf
(242 pages)
Specifications of PSB21373HV1.1XT
Lead Free Status / RoHS Status
Compliant
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Data Sheet
2.1.3
The microcontroller clock is provided by the pin MCLK. Five clock rates are selectable by
a programmable prescaler (see chapter clock generation figure 73) which is controlled
by the MODE1.MCLK bits corresponding following table. By setting the clock divider
selection bit (MODE1.CDS) a doubled MCLK frequency is available.
The possible MCLK frequencies are listed in table 4.
Table 4
MCLK Frequencies
MCLK
Bits
’00’
’01’
’10’
’11’
The clock rate is changed after CS becomes inactive.
Microcontroller Clock Generation
MCLK Frequency
with MODE1.CDS = ’0’
3.84 MHz (default)
0.96 MHz
7.68 MHz
disabled
-31
MCLK Frequency
with MODE1.CDS = ’1’
7.68 MHz (default)
1.92 MHz
15.36 MHz
disabled
PSB 21373
2002-05-13
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