LPC1850FET256,551 NXP Semiconductors, LPC1850FET256,551 Datasheet - Page 20

• Manufacturer Part Number: LPC1850FET256,551
• Description: MCU 32BIT ARM CORTEX M3 256BGA
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1850FET256,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, QEI, SD/MMC, SPI, SSI, SSP, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 200K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Processor Series: LPC1850
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 200 KB
• Interface Type: SPI Flash (SPIFI), USB, Ethernet, LCD, External Memory Controller, I2C
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 6
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6682

NXP Semiconductors
Table 3.
LPC1850_30_20_10
Objective data sheet
Symbol
PC_2
PC_3
PC_4
PC_5
PC_6
PC_7
PC_8
PC_9
PC_10
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
Pin description
F6
F5
F4
G4
H6
G5
N4
K2
M5
…continued
Reset
state
[1]
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
Type Description
I/O
O
I
O
I/O
O
O
O
I/O
I/O
-
O
I/O
I/O
-
O
I/O
I/O
-
I
I/O
I/O
-
I
I
I/O
-
I
O
I
-
I
I/O
O
I
-
All information provided in this document is subject to legal disclaimers.
USB1_ULPI_D6 — ULPI link bidirectional data line 6.
SDIO_RST — SD/MMC reset signal for MMC4.4 card.
U1_CTS — Clear to Send input for UART 1.
ENET_TXD2 — Ethernet transmit data 2 (MII interface).
USB1_ULPI_D5 — ULPI link bidirectional data line 5.
SDIO_VOLT1 — SD/MMC bus voltage select output 1.
U1_RTS — Request to Send output for UART 1. Can also be configured to be
an RS-485/EIA-485 output enable signal for UART 1.
ENET_TXD3 — Ethernet transmit data 3 (MII interface).
SDIO_D0 — SD/MMC data bus line 0.
USB1_ULPI_D4 — ULPI link bidirectional data line 4.
n.c.
ENET_TX_EN — Ethernet transmit data enable (RMII/MII interface).
SDIO_D1 — SD/MMC data bus line 1.
USB1_ULPI_D3 — ULPI link bidirectional data line 3.
n.c.
ENET_TX_ER — Ethernet Transmit Error (MII interface).
SDIO_D2 — SD/MMC data bus line 2.
USB1_ULPI_D2 — ULPI link bidirectional data line 2.
n.c.
ENET_RXD2 — Ethernet receive data 2 (MII interface).
SDIO_D3 — SD/MMC data bus line 3.
USB1_ULPI_D1 — ULPI link bidirectional data line 1.
n.c.
ENET_RXD3 — Ethernet receive data 3 (MII interface).
SDIO_CD — SD/MMC card detect input.
USB1_ULPI_D0 — ULPI link bidirectional data line 0.
n.c.
ENET_RX_DV — Ethernet Receive Data Valid (MII interface).
SDIO_POW — <tbd>.
USB1_ULPI_NXT — ULPI link NXT signal. Data flow control signal from the
PHY.
n.c.
ENET_RX_ER — Ethernet receive error (MII interface).
SDIO_CMD — SD/MMC command signal.
USB1_ULPI_STP — ULPI link STP signal. Asserted to end or interrupt
transfers to the PHY.
U1_DSR — Data Set Ready input for UART 1.
n.c.
Rev. 1.2 — 17 February 2011
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
© NXP B.V. 2011. All rights reserved.
20 of 87