LPC1850FET256,551 NXP Semiconductors, LPC1850FET256,551 Datasheet - Page 22
![MCU 32BIT ARM CORTEX M3 256BGA](/photos/27/78/277808/lbga156_sml.jpg)
LPC1850FET256,551
Manufacturer Part Number
LPC1850FET256,551
Description
MCU 32BIT ARM CORTEX M3 256BGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheet
1.LPC1830FET256551.pdf
(87 pages)
Specifications of LPC1850FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, QEI, SD/MMC, SPI, SSI, SSP, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
200K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Processor Series
LPC1850
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
200 KB
Interface Type
SPI Flash (SPIFI), USB, Ethernet, LCD, External Memory Controller, I2C
Maximum Clock Frequency
150 MHz
Number Of Programmable I/os
80
Number Of Timers
6
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6682
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1850FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC1850FET256,551
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
Table 3.
LPC1850_30_20_10
Objective data sheet
Symbol
PD_5
PD_6
PD_7
PD_8
PD_9
PD_10
PD_11
PD_12
PD_13
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
Pin description
P6
R6
T6
P8
T11
P11
N9
N11
T14
…continued
Reset
state
[1]
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
I; PU
Type Description
-
O
I/O
-
-
O
I/O
-
-
I
I/O
-
-
I
I/O
-
-
O
I/O
-
-
I
O
-
-
-
O
-
-
-
O
-
-
I
O
-
All information provided in this document is subject to legal disclaimers.
n.c.
CTOUT_9 — SCT output 9. Match output 1 of timer 2.
EXTBUS_D19 — External memory data line 19.
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CTOUT_10 — SCT output 10. Match output 2 of timer 2.
EXTBUS_D20 — External memory data line 20.
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CTIN_5 — SCT input 5. Capture input 2 of timer 2.
EXTBUS_D21 — External memory data line 21.
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CTIN_6 — SCT input 6. Capture input 1 of timer 3.
EXTBUS_D22 — External memory data line 22.
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CTOUT_13 — SCT output 13. Match output 1 of timer 3.
EXTBUS_D23 — External memory data line 23.
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CTIN_1 — SCT input 1. Capture input 1 of timer 0. Capture input 1 of timer 2.
EXTBUS_BLS3 — LOW active Byte Lane select signal 3.
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EXTBUS_CS3 — LOW active Chip Select 3 signal.
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EXTBUS_CS2 — LOW active Chip Select 2 signal.
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CTIN_0 — SCT input 0. Capture input 0 of timer 0, 1, 2, 3.
EXTBUS_BLS2 — LOW active Byte Lane select signal 2.
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Rev. 1.2 — 17 February 2011
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
© NXP B.V. 2011. All rights reserved.
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