LPC1850FET256,551 NXP Semiconductors, LPC1850FET256,551 Datasheet - Page 51

MCU 32BIT ARM CORTEX M3 256BGA

LPC1850FET256,551

Manufacturer Part Number
LPC1850FET256,551
Description
MCU 32BIT ARM CORTEX M3 256BGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheet

Specifications of LPC1850FET256,551

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, QEI, SD/MMC, SPI, SSI, SSP, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
-
Program Memory Type
ROMless
Eeprom Size
-
Ram Size
200K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Processor Series
LPC1850
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
200 KB
Interface Type
SPI Flash (SPIFI), USB, Ethernet, LCD, External Memory Controller, I2C
Maximum Clock Frequency
150 MHz
Number Of Programmable I/os
80
Number Of Timers
6
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6682

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1850FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
LPC1850FET256,551
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
LPC1850_30_20_10
Objective data sheet
7.17.8 Power control
7.18 Emulation and debugging
The LPC1850/30/20/10 support four reduced power modes: Sleep, Deep-sleep,
Power-down, and Deep power-down.
The LPC1850/30/20/10 can wake up from Deep-sleep, Power-down, and Deep
power-down modes via the WAKEUP[3:0] pins and interrupts generated by battery
powered blocks in the RTC power domain.
Debug and trace functions are integrated into the ARM Cortex-M3. Serial wire debug and
trace functions are supported in addition to a standard JTAG debug and parallel trace
functions. The ARM Cortex-M3 is configured to support up to eight breakpoints and four
watch points.
All information provided in this document is subject to legal disclaimers.
Rev. 1.2 — 17 February 2011
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
© NXP B.V. 2011. All rights reserved.
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