LPC1850FET256,551 NXP Semiconductors, LPC1850FET256,551 Datasheet - Page 61

• Manufacturer Part Number: LPC1850FET256,551
• Description: MCU 32BIT ARM CORTEX M3 256BGA
• Manufacturer: NXP Semiconductors
• Series: LPC18xxr

Specifications of LPC1850FET256,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, QEI, SD/MMC, SPI, SSI, SSP, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: -
• Program Memory Type: ROMless
• Eeprom Size: -
• Ram Size: 200K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• Processor Series: LPC1850
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 200 KB
• Interface Type: SPI Flash (SPIFI), USB, Ethernet, LCD, External Memory Controller, I2C
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 6
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6682

NXP Semiconductors
11. Dynamic characteristics
LPC1850_30_20_10
Objective data sheet
11.1 External clock
Table 10.
T
[1]
[2]
Symbol Parameter
f
T
t
t
t
t
amb
osc
CHCX
CLCX
CLCH
CHCL
Fig 16. External clock timing (with an amplitude of at least V
cy(clk)
Parameters are valid over operating temperature range unless otherwise specified.
Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply
voltages.
=

40
oscillator frequency
clock cycle time
clock HIGH time
clock LOW time
clock rise time
clock fall time

Dynamic characteristic: external clock
C to +85
All information provided in this document is subject to legal disclaimers.

C; V
Rev. 1.2 — 17 February 2011
DD(IO)
Conditions
over specified ranges.
t
CHCL
t
CLCX
Min
1
40
T
T
-
-
cy(clk)
cy(clk)
32-bit ARM Cortex-M3 microcontroller
[1]
T
LPC1850/30/20/10
cy(clk)
 <tbd>
 <tbd>
t
CLCH
t
CHCX
i(RMS)
Typ
-
-
-
-
-
-
= 200 mV)
[2]
002aaa907
© NXP B.V. 2011. All rights reserved.
Max
25
1000
-
-
<tbd>
<tbd>
ns
61 of 87
Unit
MHz
ns
ns
ns
ns