IDT82V3288BCG IDT, Integrated Device Technology Inc, IDT82V3288BCG Datasheet - Page 72

• Manufacturer Part Number: IDT82V3288BCG
• Description: IC PLL WAN 3E STRATUM 2 208CABGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3288BCG

• Input: CMOS, LVDS, PECL, TTL
• Output: CMOS, LVDS, PECL, TTL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 208-CABGA
• Frequency-max: 622.08MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3288BCG

DIFFERENTIAL_IN_OUT_OSCI_CNFG - Differential Input / Output Port & Master Clock Configuration
Programming Information
IDT82V3288
Address: 0AH
Type: Read / Write
Default Value: XXXX1001
7 - 4
Bit
3
2
1
0
7
-
OUT7_PECL_LVDS
OUT6_PECL_LVDS
OSC_EDGE
OSCI_SW
Name
-
6
-
Reserved.
This bit determines whether OSCI_MON replaces OSCI to be the master clock when OSCI fails.
0: Replace; and all the outputs are low.
1: Not replace; and the device operates abnormally. (default)
This bit selects a better active edge of the master clock.
0: The rising edge. (default)
1: The falling edge.
This bit selects a port technology for OUT7.
0: LVDS. (default)
1: PECL.
This bit selects a port technology for OUT6.
0: LVDS.
1: PECL. (default)
5
-
4
-
OSCI_SW
72
3
Description
OSC_EDGE
2
OUT7_PECL_LVDS
1
OUT6_PECL_LVDS
March 14, 2007
0
WAN PLL