EP4CE6E22C8N Altera, EP4CE6E22C8N Datasheet - Page 58

• Manufacturer Part Number: EP4CE6E22C8N
• Description: IC CYCLONE IV FPGA 6K 144EQFP
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE6E22C8N

• Number Of Logic Elements/cells: 6272
• Number Of Labs/clbs: 392
• Total Ram Bits: 270000
• Number Of I /o: 91
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 144-EQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

4–4
Output Registers
Operational Modes
Cyclone IV Device Handbook, Volume 1
1
Each multiplier operand is a unique signed or unsigned number. The signa and
signb signals control an input of a multiplier and determine if the value is signed or
unsigned. If the signa signal is high, the Data A operand is a signed number. If the
signa signal is low, the Data A operand is an unsigned number.
Table 4–2
representations. The results of the multiplication are signed if any one of the operands
is a signed value.
Table 4–2. Multiplier Sign Representation
Each embedded multiplier block has only one signa and one signb signal to control
the sign representation of the input data to the block. If the embedded multiplier
block has two 9 × 9 multipliers, the Data A input of both multipliers share the same
signa signal, and the Data B input of both multipliers share the same signb signal.
You can dynamically change the signa and signb signals to modify the sign
representation of the input operands at run time. You can send the signa and signb
signals through a dedicated input register. The multiplier offers full precision,
regardless of the sign representation.
When the signa and signb signals are unused, the Quartus II software sets the
multiplier to perform unsigned multiplication by default.
You can register the embedded multiplier output with output registers in either 18- or
36-bit sections, depending on the operational mode of the multiplier. The following
control signals are available for each output register in the embedded multiplier:
■
■
■
All input and output registers in a single embedded multiplier are fed by the same
clock, clock enable, and asynchronous clear signals.
You can use an embedded multiplier block in one of two operational modes,
depending on the application needs:
■
■
signa Value
clock
clock enable
asynchronous clear
One 18 × 18 multiplier
Up to two 9 × 9 independent multipliers
Unsigned
Unsigned
Signed
Signed
lists the sign of the multiplication results for the various operand sign
Data A
Logic Level
High
High
Low
Low
signb Value
Unsigned
Unsigned
Signed
Signed
Chapter 4: Embedded Multipliers in Cyclone IV Devices
Data B
Logic Level
High
High
Low
Low
© February 2010 Altera Corporation
Operational Modes
Unsigned
Signed
Signed
Result
Signed