EP3C5E144I7N Altera, EP3C5E144I7N Datasheet - Page 63

• Manufacturer Part Number: EP3C5E144I7N
• Description: IC CYCLONE III FPGA 5K 144 EQFP
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C5E144I7N

• Number Of Logic Elements/cells: 5136
• Number Of Labs/clbs: 321
• Total Ram Bits: 423936
• Number Of I /o: 94
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 144-EQFP
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 5136
• # I/os (max): 94
• Frequency (max): 437.5MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 5136
• Ram Bits: 423936
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: EQFP
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2557

Chapter 4: Embedded Multipliers in the Cyclone III Device Family
Operational Modes
9-Bit Multipliers
Figure 4–4. 9-Bit Multiplier Mode
© December 2009
Data A 0 [8..0]
Data A 1 [8..0]
Data B 0 [8..0]
Data B 1 [8..0]
Altera Corporation
You can configure each embedded multiplier to support two 9 × 9 independent
multipliers for input widths of up to 9 bits.
Figure 4–4
multipliers.
All 9-bit multiplier inputs and results are independently sent through registers. The
multiplier inputs can accept signed integers, unsigned integers, or a combination of
both. Two 9 × 9 multipliers in the same embedded multiplier block share the same
signa and signb signal. Therefore, all the Data A inputs feeding the same
embedded multiplier must have the same sign representation. Similarly, all the
Data B inputs feeding the same embedded multiplier must have the same sign
representation.
shows the embedded multiplier configured to support two 9-bit
ENA
ENA
ENA
ENA
D
D
D
D
CLRN
CLRN
CLRN
CLRN
signa
signb
clock
Q
Q
Q
Q
ena
aclr
Embedded Multiplier
ENA
ENA
D
D
9 × 9 Multiplier
9 × 9 Multiplier
CLRN
CLRN
Q
Q
Cyclone III Device Handbook, Volume 1
Data Out 0 [17..0]
Data Out 1 [17..0]
4–7