Z84C9008VSG Zilog, Z84C9008VSG Datasheet - Page 292

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Z84C9008VSG

Manufacturer Part Number
Z84C9008VSG
Description
IC 8MHZ Z80 KIO 84-PLCC
Manufacturer
Zilog
Series
Z80r
Datasheets

Specifications of Z84C9008VSG

Processor Type
Z80
Features
Serial/Parallel Input/Output, Counter/Timer Circuit
Speed
8MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
84-LCC (J-Lead)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Cpu Speed
8MHz
Digital Ic Case Style
LCC
No. Of Pins
84
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Rohs Compliant
Yes
Base Number
84
Clock Frequency
8MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z84C9008VSG
Manufacturer:
Zilog
Quantity:
13
Part Number:
Z84C9008VSG
Manufacturer:
ZILOG
Quantity:
6 221
Part Number:
Z84C9008VSG
Manufacturer:
Zilog
Quantity:
10 000
272
Operation:
Op Code:
Description: The contents of register C are placed on the bottom half (A0 through A7) of
Condition Bits Affected:
Example:
UM008005-0205
Z80 CPU
User’s Manual
(HL) ← (C), B ← B -1, HL ← HL + 1
INI
the address bus to select the I/O device at one of 256 possible ports.
Register B may be used as a byte counter, and its contents are placed on the
top half (A8 through A15) of the address bus at this time. Then one byte
from the selected port is placed on the data bus and written to the CPU. The
contents of the HL register pair are then placed on the address bus and the
input byte is written to the corresponding location of memory. Finally, the
byte counter is decremented and register pair HL is incremented.
S is unknown
Z is set if B–1 = 0, reset otherwise
H is unknown
P/V is unknown
N is set
C is not affected
If the contents of register C are
contents of the HL register pair are
peripheral device mapped to I /O port address
memory location
1001H
1
1
1
0
, and register B contains
M Cycles
1
1
4
0
0
1000H
1
0
contains
16 (4, 5, 3, 4)
1
0
INI
T States
07H
0
1
0FH
7BH
1000H
, the contents of register B are
.
1
0
, the HL register pair contains
ED
A2
, and byte
07H
4 MHz E.T.
. At execution of
4.00
7BH
Z80 Instruction Set
is available at the
10H
INI
, the

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