Z84C9008VSG Zilog, Z84C9008VSG Datasheet - Page 80
![no-image](/images/manufacturer_photos/0/7/729/zilog_sml.jpg)
Z84C9008VSG
Manufacturer Part Number
Z84C9008VSG
Description
IC 8MHZ Z80 KIO 84-PLCC
Manufacturer
Zilog
Series
Z80r
Specifications of Z84C9008VSG
Processor Type
Z80
Features
Serial/Parallel Input/Output, Counter/Timer Circuit
Speed
8MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
84-LCC (J-Lead)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Cpu Speed
8MHz
Digital Ic Case Style
LCC
No. Of Pins
84
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Rohs Compliant
Yes
Base Number
84
Clock Frequency
8MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
Z84C9008VSG
Manufacturer:
Zilog
Quantity:
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Company:
Part Number:
Z84C9008VSG
Manufacturer:
ZILOG
Quantity:
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UM008005-0205
Z80 CPU
User’s Manual
Five general-purpose arithmetic instructions operate on the accumulator
or carry flag. These five are listed in Table 12. The decimal adjust
instruction can adjust for subtraction as well as addition, making BCD
arithmetic operations simple. Note that to allow for this operation the flag
N is used. This flag is set if the last arithmetic operation was a subtract.
The negate accumulator (
the number in the accumulator. Finally, notice that a reset carry
instruction is not included in the Z80 because this operation can be easily
achieved through other instructions such as a logical AND of the
accumulator with itself.
Table 13 lists all the 16-bit arithmetic operations between 16-bit registers.
There are five groups of instructions including add with carry and subtract
with carry.
address calculation operations or other 16-bit arithmetic operations.
Table 11. 8-Bit Arithmetic and Logic
ADD
ADD W CARRY
ADC
SUBTRACT
SUB
SUB w CARR
SBC
AND
XOR
ADC
Source
A
87
8F
97
9F
A7 A0 A1 A2 A3 A4 A5 A6
AF A8 A9 AA AB AC AD AE
Register Addressing
and
B
80
88
90
98
SBC
81
89
91
99
C
affect all the flags. These two groups simplify
D
82
8A 8B
92
9A 9B
NEG
E
83
93
) instruction forms the two’s complement of
F
84
8C
94
9C
L
85
8D 8E
95
9D 9E
Reg Indir.
(HL)
88
96
Z80 CPU Instruction Description
Indexed
(IX+d)
DD
86
d
DD
8E
d
DD
96
d
DD
9E
d
DD
A6
d
DD
AE
d
(lY+d)
FD
86
d
FD
8E
d
FD
96
d
FD
9E
d
FD
A6
d
FD
AE
d
Immed.
n
C6
n
CE
n
D6
n
DE
n
E6
n
EE
n
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