Z84C9008VSG Zilog, Z84C9008VSG Datasheet - Page 79
![no-image](/images/manufacturer_photos/0/7/729/zilog_sml.jpg)
Z84C9008VSG
Manufacturer Part Number
Z84C9008VSG
Description
IC 8MHZ Z80 KIO 84-PLCC
Manufacturer
Zilog
Series
Z80r
Specifications of Z84C9008VSG
Processor Type
Z80
Features
Serial/Parallel Input/Output, Counter/Timer Circuit
Speed
8MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
84-LCC (J-Lead)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Cpu Speed
8MHz
Digital Ic Case Style
LCC
No. Of Pins
84
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Rohs Compliant
Yes
Base Number
84
Clock Frequency
8MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Price
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Z84C9008VSG
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UM008005-0205
Address A
(
specified 8-bit operation is performed between the data in the
accumulator and the source data. The result of the operation is placed in
the accumulator with the exception of compare (
accumulator unchanged. All these operations effect the flag register as a
result of the specified operation.
register or a memory location as both source and destination of the result.
When the source operand is addressed using the index registers, the
displacement must follow directly. With immediate addressing, the actual
operand follows directly. For example, the instruction
Assuming that the accumulator contained the value F3H, the result of
is placed in the accumulator:
The Add instruction (
source location and the data in the accumulator. The Subtract (
performs a binary subtraction. When the Add with Carry is specified,
(
or subtracted respectively. The flags and decimal adjust instruction (
in the Z80 allow arithmetic operations for:
•
•
•
Other instructions in this group are logical and (
exclusive or (
DEC
ADC
A+1
Multiprecision packed BCD numbers
Multiprecision signed or unsigned binary numbers
Multiprecision two’s complement signed numbers
) instructions. In all these instructions, except
) or the Subtract with Carry (
Accumulator before operation
Operand
Result to Accumulator
E6
07
XOR
Operand
Op Code
), and compare (
ADD
0000 0111
) performs a binary add between the data in the
0000 0011
INC
SBC
CP
).
=
and
), then the Carry flag is also added
1111 0011
07H
Z80 CPU Instruction Description
DEC
=
03H
instructions specify a
AND
CP
INC
) that leaves the
=
), logical or (
F3H
AND 07H
and
User’s Manual
DEC
Z80 CPU
SUB
, the
OR
is:
)
),
DAA
03H
)
59
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