Z84C9008VSG Zilog, Z84C9008VSG Datasheet - Page 68

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Z84C9008VSG

Manufacturer Part Number
Z84C9008VSG
Description
IC 8MHZ Z80 KIO 84-PLCC
Manufacturer
Zilog
Series
Z80r
Datasheets

Specifications of Z84C9008VSG

Processor Type
Z80
Features
Serial/Parallel Input/Output, Counter/Timer Circuit
Speed
8MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
84-LCC (J-Lead)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Cpu Speed
8MHz
Digital Ic Case Style
LCC
No. Of Pins
84
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Rohs Compliant
Yes
Base Number
84
Clock Frequency
8MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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48
UM008005-0205
Z80 CPU
User’s Manual
Instruction Op Codes
except that a displacement is added with indexed addressing. Register
indirect addressing allows for very powerful but simple to implement
memory accesses. The block move and search commands in the Z80 are
extensions of this type of addressing where automatic register
incrementing, decrementing, and comparing has been added. The notation
for indicating register indirect addressing is to put parentheses around the
name of the register that is to be used as the pointer. For example, the
symbol
as a pointer to a memory location. Often register indirect addressing is
used to specify 16-bit operands. In this case, the register contents point to
the lower order portion of the operand while the register contents are
automatically incremented to obtain the upper portion of the operand.
Bit Addressing
The Z80 contains a large number of bit set, reset, and test instructions.
These instructions allow any memory location or CPU register to be
specified for a bit operation through one of three previous addressing
modes (register, register indirect, and indexed) while three bits in the Op
Code specify which of the eight bits is to be manipulated.
Addressing Mode Combinations
Many instructions include more than one operand (such as arithmetic
instructions or loads). In these cases, two types of addressing may be
employed. For example, load can use immediate addressing to specify the
source and register indirect or indexed addressing to specify the
destination.
This section describes each of the Z80 instructions and provides tables
listing the Op Codes for every instruction. In each of these tables, the Op
Codes in shaded areas are identical to those offered in the 8080A CPU.
(HL)
specifies that the contents of the
Z80 CPU Instruction Description
HL
register are to be used

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