Z84C9008VSG Zilog, Z84C9008VSG Datasheet - Page 90

• Manufacturer Part Number: Z84C9008VSG
• Description: IC 8MHZ Z80 KIO 84-PLCC
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z84C9008VSG

• Processor Type: Z80
• Features: Serial/Parallel Input/Output, Counter/Timer Circuit
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 84-LCC (J-Lead)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Cpu Speed: 8MHz
• Digital Ic Case Style: LCC
• No. Of Pins: 84
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Rohs Compliant: Yes
• Base Number: 84
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

70
UM008005-0205
Z80 CPU
User’s Manual
Table 17 lists the eight Op Codes for the restart instruction. This
instruction is a single byte call to any of the eight addresses listed. The
simple mnemonic for these eight calls is also listed. This instruction is
useful for frequently-used routines because memory consumption is
minimized.
Table 17. Restart Group
Input/Output
The Z80 has an extensive set of input and output instructions as shown in
Table 18 and Table 19. The addressing of the input or output device can
be either absolute or register indirect, using the C register. In the register
indirect addressing mode, data can be transferred between the I/O devices
and any of the internal registers. In addition, eight block transfer
instructions have been implemented. These instructions are similar to the
memory block transfers except that they use register pair HL for a pointer
to the memory source (output commands) or destination (input
commands) while register B is used as a byte counter. Register C holds
the address of the port for which the input or output command is required.
Because register B is eight bits in length, the I/O block transfer command
handles up to 256 bytes.
In the instructions
the lower half of the address bus (A7-A0) while the accumulator content
CALL Address
0000H
0008H
0010H
0018H
0020H
0028H
0030H
0038H
IN A
Op
Code
C7
CF
D7
DF
E7
EF
F7
FF
, and
OUT n
RST 0
RST 8
RST 16
RST 24
RST 32
RST 40
RST 48
RST 56
,
A
, the I/O device address n appears in
Z80 CPU Instruction Description