KSZ8842-16MQL Micrel Inc, KSZ8842-16MQL Datasheet - Page 116

• Manufacturer Part Number: KSZ8842-16MQL
• Description: IC SWITCH 10/100 16BIT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8842-16MQL

• Data Rate: 100Mbps
• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 122mA
• Supply Voltage Range: 3.1V To 3.5V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: QFP
• No. Of: RoHS Compliant
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Interface Type: PCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1634 - BOARD EVALUATION KSZ8842-16MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1478-5

Synchronous Write Timing (VLBUSN = 0)
Micrel Confidential
November 2005
Symbol
t10
t11
t12
t1
t2
t3
t4
t5
t6
t7
t8
t9
Address, AEN, BExN
Parameter
A1-A15, AEN, BExN[3:0] setup to ADSN rising
A1-A15, AEN, BExN[3:0] hold after ADSN rising
CYCLEN setup to LCLK rising
CYCLEN hold after LCLK rising (non-burst mode)
SWR setup to BCLK
SWR hold after LCLK rising with SRDYN active
Write data setup to LCLK rising
Write data hold from LCLK rising
SRDYN setup to BCLK
SRDYN hold to BCLK
RDYRTNN setup to BCLK
RDYRTNN hold to BCLK
RDYRTNN
Write Data
CYCLEN
SRDYN
Table 30. Synchronous Write (VLBUSN = 0) Timing Parameters
A
BCLK
SWR
DS
Figure 22. Synchronous Write Cycle – VLBUSN = 0
N
valid
t1
116
t2
t5
t3
t4
Min
4
2
4
2
4
0
5
1
8
1
4
1
t9
t11
t7
valid
Typ
t6
t8
t10
t12
Max
KSZ8842-16/32 MQL/MVL
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. 1.4