KSZ8842-16MQL Micrel Inc, KSZ8842-16MQL Datasheet - Page 7

• Manufacturer Part Number: KSZ8842-16MQL
• Description: IC SWITCH 10/100 16BIT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8842-16MQL

• Data Rate: 100Mbps
• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 122mA
• Supply Voltage Range: 3.1V To 3.5V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: QFP
• No. Of: RoHS Compliant
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Interface Type: PCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1634 - BOARD EVALUATION KSZ8842-16MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1478-5

MIB (Management Information Base) Counters ................................................................ 102
Static MAC Address Table .................................................................................................. 105
Dynamic MAC Address Table ............................................................................................. 106
VLAN Table........................................................................................................................... 107
Absolute Maximum Ratings
Operating Ratings
Electrical Characteristics
Timing Specifications .......................................................................................................... 110
Selection of Isolation Transformers................................................................................... 121
Selection of Reference Crystal ........................................................................................... 121
Package Information............................................................................................................ 122
Acronyms and Glossary...................................................................................................... 124
Micrel Confidential
November 2005
Bank 49 Port 1 Status Register (0x04): P1SR ..................................................................................................................95
Bank 50 Port 2 Control Register 1 (0x00): P2CR1............................................................................................................96
Bank 50 Port 2 Control Register 2 (0x02): P2CR2............................................................................................................96
Bank 50 Port 2 VID Control Register (0x04): P2VIDCR....................................................................................................96
Bank 50 Port 2 Control Register 3 (0x06): P2CR3............................................................................................................96
Bank 50 Port 2 Ingress Rate Control Register (0x08): P2IRCR........................................................................................96
Bank 50 Port 2 Egress Rate Control Register (0x0A): P2ERCR.......................................................................................96
Bank 51 Port 2 PHY Special Control/Status, LinkMD (0x00): P2SCSLMD .......................................................................97
Bank 51 Port 2 Control Register 4 (0x02): P2CR4............................................................................................................98
Bank 51 Port 2 Status Register (0x04): P2SR ..................................................................................................................99
Bank 52 Host Port Control Register 1 (0x00): P3CR1 ....................................................................................................100
Bank 52 Host Port Control Register 2 (0x02): P3CR2 ....................................................................................................100
Bank 52 Host Port VID Control Register (0x04): P3VIDCR ............................................................................................101
Bank 52 Host Port Control Register 3 (0x06): P3CR3 ....................................................................................................101
Bank 52 Host Port Ingress Rate Control Register (0x08): P3IRCR ................................................................................101
Bank 52 Host Port Egress Rate Control Register (0x0A): P3ERCR ...............................................................................101
Banks 53 – 63: Reserved................................................................................................................................................101
Format of “All Port Dropped Packet” MIB Counters ........................................................................................................103
Additional MIB Information..............................................................................................................................................104
Static MAC Table Lookup Examples:..............................................................................................................................105
Dynamic MAC Address Lookup Example: ......................................................................................................................106
VLAN Table Lookup Examples: ......................................................................................................................................107
Asynchronous Timing without using Address Strobe (ADSN = 0)...................................................................................110
Asynchronous Timing using Address Strobe (ADSN) .....................................................................................................111
Asynchronous Timing using DATACSN..........................................................................................................................112
Address Latching Timing for All Modes...........................................................................................................................113
Synchronous Timing in Burst Write (VLBUSN = 1) .........................................................................................................114
Synchronous Timing in Burst Read (VLBUSN = 1).........................................................................................................115
Synchronous Write Timing (VLBUSN = 0) ......................................................................................................................116
Synchronous Read Timing (VLBUSN = 0) ......................................................................................................................117
EEPROM Timing.............................................................................................................................................................118
Auto Negotiation Timing..................................................................................................................................................119
Reset Timing...................................................................................................................................................................120
(1)
............................................................................................................. 108
(1)
................................................................................................. 109
(1)
............................................................................................. 108
7
KSZ8842-16/32 MQL/MVL
Rev. 1.4