KSZ8842-16MQL Micrel Inc, KSZ8842-16MQL Datasheet - Page 65

• Manufacturer Part Number: KSZ8842-16MQL
• Description: IC SWITCH 10/100 16BIT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8842-16MQL

• Data Rate: 100Mbps
• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 122mA
• Supply Voltage Range: 3.1V To 3.5V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: QFP
• No. Of: RoHS Compliant
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Interface Type: PCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1634 - BOARD EVALUATION KSZ8842-16MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1478-5

Bank 19 Multicast Table Register 0 (0x00): MTR0
The 64-bit multicast table is used for group address filtering. This value is defined as the six most significant bits from
CRC circuit calculation result that is based on 48-bit of DA input. The two most significant bits select one of the four
registers to be used, while the others determine which bit within the register.
Multicast table register 0.
Bank 19 Multicast Table Register 1 (0x02): MTR1
Multicast table register 1.
Bank 19 Multicast Table Register 2 (0x04): MTR2
Multicast table register 2.
Bank 19 Multicast Table Register 3 (0x06): MTR3
Multicast table register 3.
Banks 20 – 31: Reserved
Except Bank Select Register (0xE).
Micrel Confidential
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
November 2005
Default Value
0x0000
Default Value
0x0000
Default Value
0x0000
Default Value
0x0000
R/W
RW
R/W
RW
R/W
RW
R/W
RW
Description
MTR0 Multicast Table 0
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
Description
MTR0 Multicast Table 1
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
Description
MTR0 Multicast Table 2
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
Description
MTR0 Multicast Table 3
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
65
KSZ8842-16/32 MQL/MVL
Rev. 1.4