KSZ8842-16MQL Micrel Inc, KSZ8842-16MQL Datasheet - Page 58

• Manufacturer Part Number: KSZ8842-16MQL
• Description: IC SWITCH 10/100 16BIT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8842-16MQL

• Data Rate: 100Mbps
• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 122mA
• Supply Voltage Range: 3.1V To 3.5V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: QFP
• No. Of: RoHS Compliant
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Interface Type: PCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1634 - BOARD EVALUATION KSZ8842-16MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1478-5

Bank 3 Bus Configuration Register (0x08): BCFG
This register is a read-only register. The bit 0 is automatically downloaded from bit 0 Configparm word of EEPROM , if pin
EEEN is high (enabled EEPROM)
Banks 4 – 15: Reserved
Except Bank Select Register (0xE).
Bank 16 Transmit Control Register (0x00): TXCR
This register holds control information programmed by the CPU to control the QMU transmit module function.
Bank 16 Transmit Status Register (0x02): TXSR
This register keeps the status of the last transmitted frame.
Micrel Confidential
Bit
15-1
0
Bit
15
14
13
12-4
3
2
1
0
Bit
15-6
5-0
November 2005
Default Value
0x0000
-
Default Value
-
0x0
0x0
-
0x0
0x0
0x0
0x0
Default Value
0x000
-
R/W
RO
RO
R/W
RO
RW
RW
RO
RW
RW
RW
RW
R/W
RO
RO
Description
Reserved
Reserved
Reserved
Reserved
TXFCE Transmit Flow Control Enable
When this bit is set, the QMU sends flow control pause frames from the host port if the
RX FIFO has reached its threshold.
Note: the SGCR3[5] in Bank 32 also needs to be enabled.
TXPE Transmit Padding Enable
When this bit is set, the KSZ8842M automatically adds a padding field to a packet
shorter than 64 bytes.
Note: Setting this bit requires enabling the ADD CRC feature to avoid CRC errors for
the transmit packet.
TXCE Transmit CRC Enable
When this bit is set, the KSZ8842M automatically adds a CRC checksum field to the
end of a transmit frame.
TXE Transmit Enable
When this bit is set, the transmit module is enabled and placed in a running state.
When reset, the transmit process is placed in the stopped state after the transmission
of the current frame is completed.
Description
Reserved
TXFID Transmit Frame ID
This field identifies the transmitted frame. All of the transmit status information in this
register belongs to the frame with this ID.
Description
Reserved
Bus Configuration (only for KSZ8842-16 device)
1: bus width is 16 bits.
0: bus width is 8 bits.
(this bit is only avaiable when EEPROM is enabled)
58
KSZ8842-16/32 MQL/MVL
Rev. 1.4