KSZ8842-16MQL Micrel Inc, KSZ8842-16MQL Datasheet - Page 66

• Manufacturer Part Number: KSZ8842-16MQL
• Description: IC SWITCH 10/100 16BIT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KSZ8842-16MQL

• Data Rate: 100Mbps
• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 122mA
• Supply Voltage Range: 3.1V To 3.5V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: QFP
• No. Of: RoHS Compliant
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Interface Type: PCI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1634 - BOARD EVALUATION KSZ8842-16MQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1478-5

Bank 32 Switch ID and Enable Register (0x00): SIDER
This register contains the switch ID and the switch enable control.
Bank 32 Switch Global Control Register 1 (0x02): SGCR1
This register contains the global control for the switch function.
Micrel Confidential
Bit
15-8
7-4
3-1
0
Bit
15
14
13
12
11
10
9
8
7-4
3
2-1
0
November 2005
Default
0x88
0x0
0x0
0
Default
0
0
1
1
0
1
0
0
-
0x0
-
0
R/W
RO
RO
RO
RW
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Description
Family ID
Chip family ID
Chip ID
0x0 is assigned to KSZ8842M
Revision ID
Start Switch
1 = start the chip.
0 = switch is disabled.
Description
Pass All Frames
1 = switch all packets including bad ones. Used solely for debugging purposes. Works
in conjunction with Sniffer mode only.
Reserved
IEEE 802.3x Transmit Direction Flow Control Enable
1 = enables transmit direction flow control feature.
0 = will not enable transmit direction flow control feature. The switch will not generate
any flow control packets.
IEEE 802.3x Receive Direction Flow Control Enable
1 = enables receive direction flow control feature.
0 = will not enable receive direction flow control feature. The switch will not react to
any received flow control packets.
Frame Length Field Check
1 = checks frame length field in the IEEE packets. If the actual length does not match,
the packet will be dropped (for Length/Type field < 1500).
Aging Enable
1 = enable age function in the chip.
0 = disable age function in the chip.
Fast Age Enable
1 = turn on fast age (800us).
Aggressive Back-Off Enable
1 = enable more aggressive back off algorithm in half-duplex mode to enhance
performance. This is not an IEEE standard.
Reserved
Pass Flow Control Packet
1 = switch will not filter 802.1x “flow control” packets.
Reserved
Link Change Age
1 = link change from “link” to “no link” will cause fast aging (<800us) to age address
table faster. After an age cycle is complete, the age logic will return to normal (300 +
75 seconds).
Note: If any port is unplugged, all addresses will be automatically aged out.
66
KSZ8842-16/32 MQL/MVL
Rev. 1.4