IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 11

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

FEATURES
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IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
 2005 Integrated Device Technology, Inc.
Octal Framer supporting T1, E1 and J1 formats
Provides programmable system interface to support Zarlink Semi-
conductor Inc. ST-BUS
data rates of 1.544, 2.048 & 8.192 Mb/s; up to four links can be
byte-interleaved on one system bus without external logic
Provides up to three internal floating HDLC controllers for each
framer to support ISDN PRI and V5.X interface. Each HDLC con-
tains 128-byte deep FIFOs in both receive and transmit directions
Provides jitter attenuation performance exceeding the requirements
set by the associated standards for both Rx and Tx path
Provides payload, line and digital loopbacks
Provides a floating Pseudo Random Bit Sequence / repetitive pat-
tern generator/detector, which can be assigned to any one of eight
framers, the pattern may be inserted / detected on an unframed or
Nx64K or Nx56K (T1 only) basis
Provides signaling insertion / extraction for CCS / CAS and RBS
signaling system
Provides programmable codes insertion, data / sign inversion and
digital milliwatt code insertion on a per channel / timeslot basis
Supports automatic / manual alarming transmit and integration
Provides performance monitor to count CRC error, framing bit error,
far end block CRC error (E1), out of frame event (T1/J1) and
change of frame alignment event (T1/J1)
Provides programmable Inband Loopback Code transmitter/
receiver, Bit Oriented Message generator/detector
Supports polled or interrupt driven processing for all events
Supports multiplexed or non-multiplexed address/data bus MPU
interface for configuration, control and status monitoring
JTAG boundary scan meets IEEE 1149.1
Low power 3.3 V CMOS technology with 5 V tolerant inputs
Operating industrial temperature range: -40 °C to +85 °C
Package available: 128 pin PQFP
Green Package Option available
144 pin PBGA
®
, AT&T
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CHI and MVIP bus, supporting
T1 / E1 / J1 Octal Framer
1
APPLICATIONS
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STANDARDS
E1 MODE:
ITU-T:
ETSI:
GO - MVIP
T1/J1 MODE:
ANSI:
TR:
AT&T:
TTC:
High density internet E1 or T1 / J1 interface for routers, multiplex-
ers, switches and digital modems
Frame relay switches and access devices (FRADS)
SONET / SDH Add / Drop multiplexers
Digital private branch exchanges (PBX)
Channel service units (CSU) and data service units (DSU)
Channel banks and multiplexers
Digital Access and Cross-Connect systems (DACS)
G.704, G.706, G.732, G.802, G.737, G.738, G.739, G.742,
G.823, G.964, G.965, I.431, O.151, O.152, O.153;
ETS 300 011, ETS 300 233, ETS 324-1, ETS 347-1, TBR 4,
TBR 12, TBR 13;
T1.107, T1.231, T1.403, T1.408;
TSY-000147, TSY-000191, NWT-000303, TSY-000312,
TSY-000-499;
TR 54016, TR 62411
JT-G 703, JT-G 704, JT-G706, JT-G 1431
IDT82V2108
March 5, 2009
DSC-6039/4