IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 186

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IDT82V2108PX

Manufacturer Part Number
IDT82V2108PX
Description
IC FRAMER T1/J1/E1 8CH 128-PQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82V2108PX

Controller Type
T1/E1/J1 Framer
Interface
Parallel
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
82V2108PX

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IDT82V2108
E1 FRMG International Bits Control (042H, 0C2H, 142H, 1C2H, 242H, 2C2H, 342H, 3C2H)
Si[1:0]:
into the first of each FAS frame and NFAS frame respectively. When CRC Multi-Frame generation is enabled (GENCRC is logic 1) and FEBE indica-
tion is disabled (FEBEDIS is logic 1), the values programmed in the Si[1] and Si[0] bit positions are inserted into the E1 & E2 bit positions respectively.
When GENCRC is logic 1 and FEBEDIS is logic 0, both Si[1] and Si[0] are ignored.
E1 FRMG Extra Bits Control (043H, 0C3H, 143H, 1C3H, 243H, 2C3H, 343H, 3C3H)
X[2:0]:
Programming Information
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
Valid when the FDIS (b3, E1-040H) and the INDIS (b1, E1-040H) are logic 0.
When CRC Multi-Frame generation is disabled (GENCRC is logic 0), the Si[1] and Si[0] bits can be programmed to any value and will be inserted
Valid when the FDIS (b3, E1-040H), the XDIS (b0, E1-040H), the SIGEN (b6, E1-040H) and the DLEN (b5, E1-040H) are all logic 0.
Replace the extra bits located in bits 5, 7 & 8 in TS16 of frame 0 of the Signaling Multi-Frame.
Si[1]
R/W
7
1
7
Si[0]
R/W
6
1
6
Reserved
5
5
4
4
176
R/W
X[0]
3
3
1
Reserved
Reserved
2
2
T1 / E1 / J1 OCTAL FRAMER
R/W
X[1]
1
1
1
March 5, 2009
R/W
X[2]
0
0
1

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