PSB3186FV14XT Lantiq, PSB3186FV14XT Datasheet - Page 21

• Manufacturer Part Number: PSB3186FV14XT
• Manufacturer: Lantiq

Specifications of PSB3186FV14XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Table 2
Pin No.
MQFP-64
TQFP-64
15
16
39
40
Data Sheet
Symbol
AD6
SDR
AD7
SDX
RD
DS
WR
R/W
ISAC-SX TE Pin Definitions and Functions (cont’d)
Input (I)
Output (O)
Open Drain
(OD)
I/O
I
I/O
OD
I
I
I
I
Function
• Multiplexed Bus Mode:
Address/data bus
Address/data line AD6 if the parallel interface is
selected.
• Non-Multiplexed Bus Mode:
Data bus
Data line D6 if the parallel interface is selected.
SCI - Serial Data Receive
Receive data line of the SCI interface if a serial
interface is selected.
• Multiplexed Bus Mode:
Address/data bus
Address/data line AD7 if the parallel interface is
selected.
• Non-Multiplexed Bus Mode:
Data bus
Data line D7 if the parallel interface is selected.
SCI - Serial Data Transmit
Transmit data line of the SCI interface if a serial
interface is selected.
Read
Indicates a read access to the registers (Siemens/
Intel bus mode).
Data Strobe
The rising edge marks the end of a valid read or
write operation (Motorola bus mode).
Write
Indicates a write access to the registers (Siemens/
Intel bus mode).
Read/Write
A HIGH identifies a valid host access as a read
operation and a LOW identifies a valid host access
as a write operation (Motorola bus mode).
21
Pin Configuration
ISAC-SX TE
PSB 3186
2003-01-30