PI7C7300ANAE Pericom Semiconductor, PI7C7300ANAE Datasheet - Page 39

• Manufacturer Part Number: PI7C7300ANAE
• Description: IC PCI-PCI BRIDGE 3PORT 272-BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C7300ANAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 272-PBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.9.4.2
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For delayed read transactions:
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For posted write transactions:
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When a target retry is returned to the initiator of a delayed transaction, the initiator must
repeat the transaction with the same address and bus command as well as the data if it is
a write transaction, within the time frame specified by the master timeout value.
Otherwise, the transaction is discarded from the buffers.
TARGET DISCONNECT
Target response has been received but has not progressed to the head of the return
queue.
The delayed transaction queue is full, and the transaction cannot be queued.
A transaction with the same address and command has been queued.
A locked sequence is being propagated across PI7C7300A, and the write transaction
is not a locked transaction.
The target bus is locked and the write transaction is a locked transaction.
Use more than 16 clocks to accept this transaction.
The transaction is being entered into the delayed transaction queue.
The read request has already been queued, but read data is not yet available.
Data has been read from target, but it is not yet at head of the read data queue or a
posted write transaction precedes it.
The delayed transaction queue is full, and the transaction cannot be queued.
A delayed read request with the same address and bus command has already been
queued.
A locked sequence is being propagated across PI7C7300A, and the read transaction
is not a locked transaction.
PI7C7300A is currently discarding previously pre-fetched read data.
The target bus is locked and the write transaction is a locked transaction.
Use more than 16 clocks to accept this transaction.
The posted write data buffer does not have enough space for address and at least one
DWORD of write data.
A locked sequence is being propagated across PI7C7300A, and the write transaction
is not a locked transaction.
Page 39 OF 109
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
09/25/03 Revision 1.09
PI7C7300A