PI7C7300ANAE Pericom Semiconductor, PI7C7300ANAE Datasheet - Page 98

• Manufacturer Part Number: PI7C7300ANAE
• Description: IC PCI-PCI BRIDGE 3PORT 272-BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C7300ANAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 272-PBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 16-2 JTAG BOUNDARY REGISTER ORDER
master. The bus master can be either automatic test equipment or a component (i.e., PLD)
that interfaces to the TAP. The TAP controller changes state only in response to a rising
edge of TCK. The value of the test mode state (TMS) input signal at a rising edge of
TCK controls the sequence of state changes. The TAP controller is initialized after
power-up by applying a low to the TRST# pin. In addition, the TAP controller can be
initialized by applying a high signal level on the TMS input for a minimum of five TCK
periods.
For greater detail on the behavior of the TAP controller, test logic in each controller state
and the state machine and public instructions, refer to the IEEE 1149.1 Standard Test
Access Port and Boundary-Scan Architecture document (available from the IEEE).
Order
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
Pin Names
ENUM#
ENUM#
HS_EN
S_CFN#
S1_EN
S2_EN
SCAN_TM#
SCAN_EN
PLL_TM
BYPASS
S2_M66EN
P_RESET#
P_GNT#
P_REQ#
P_REQ#
P_AD[30]
P_AD[30]
P_AD[31]
P_AD[31]
P_AD[27]
P_AD[27]
P_AD[26]
P_AD[26]
P_AD[28]
P_AD[28]
P_AD[29]
P_AD[29]
P_CBE[3]
P_CBE[3]
P_AD[24]
P_AD[24]
P_AD[25]
P_AD[25]
P_AD[23]
P_AD[23]
P_AD[22]
P_AD[22]
P_IDSEL
P_AD[21]
P_AD[21]
P_AD[20]
P_AD[20]
P_AD[19]
P_AD[19]
P_AD[18]
P_AD[18]
Page 98 OF 109
Type
output
control
input
input
input
input
input
input
input
input
input
input
input
output
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
input
bidir
control
bidir
control
bidir
control
bidir
control
Order
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
P_STOP#
P_SERR#
P_AD[15]
P_AD[12]
P_AD[2]
P_PAR
Pin Names
P_PERR#
P_PERR#
P_LOCK#
P_SERR#
P_AD[13]
P_AD[13]
P_AD[14]
P_AD[14]
P_AD[11]
P_AD[11]
P_AD[15]
P_AD[12]
P_AD[8]
P_AD[8]
P_CBE[1]
P_CBE[1]
P_AD[9]
P_AD[9]
P_AD[5]
P_AD[5]
P_M66EN
P_AD[6]
P_AD[6]
P_AD[2]
P_PAR
P_AD[0]
P_AD[0]
P_CBE[0]
P_CBE[0]
P_AD[7]
P_AD[7]
P_AD[10]
P_AD[10]
P_AD[1]
P_AD[1]
P_AD[3]
P_AD[3]
P_AD[4]
P_AD[4]
S1_AD[0]
09/25/03 Revision 1.09
PI7C7300A
Type
control
bidir
control
input
output
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
input
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir
control
bidir