PI7C7300ANAE Pericom Semiconductor, PI7C7300ANAE Datasheet - Page 70

• Manufacturer Part Number: PI7C7300ANAE
• Description: IC PCI-PCI BRIDGE 3PORT 272-BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C7300ANAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 272-PBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.2
14
SECONDARY INTERFACE
CONFIGURATION REGISTERS
As PI7C7300A supports two secondary interfaces, it has two sets of configuration
registers that are almost identical and accessed through different function numbers. PCI
configuration defines a 64-byte space (configuration header) to define various attributes
of the PCI-to-PCI Bridge as shown below. There are two configuration registers:
Configuration Register 1 and Configuration Register 2 corresponding to Secondary Bus
P_CBE [3:0] #
1100
1101
1110
1111
S1_CBE [3:0] #
S2_CBE [3:0] #
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Command
Memory Read
Multiple
Dual Address Cycle
Memory Read Line
Memory Write and
Invalidate
Command
Interrupt
Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Memory Write
Reserved
Reserved
Configuration Read
Configuration Write
Memory Read
Multiple
Dual Address Cycle
Memory Read Line
Memory Write and
Invalidate
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Action
1.
2.
3. Otherwise ignore
Same as Memory Read
Supported
Same as Memory Read
Same as Memory Read
Action
Ignore
Do not claim. Ignore.
Same as Primary Interface
Same as I/O Read.
-----
-----
Same as Primary Interface
Same as Memory Read.
-----
-----
Ignore
I. Type 0 Configuration Write: Ignore
II. Type 1 Configuration Write (not special cycle
III. Configuration Write as Special Cycle Request (device
1.
2.
3.
Same as Memory Read
Supported
Same as Memory Read
Same as Memory Read
claim and pass through as a special cycle.
behind the bridge (but not equal to the secondary
bus): claim and pass through unchanged as a type
1 Configuration Write.
If the target bus is the bridges secondary bus:
If the target bus is a subordinate bus that exists
If the target bus is the bridge’s primary bus: claim and
pass through as a Special Cycle
If the target bus is neither the primary bus nor is it in
range of buses defined by the bridge’s secondary and
subordinate bus registers: claim and pass through
unchanged as a Type 1 Configuration Write.
If the target bus is not the bridge’s primary bus, but is
in range of buses defined by the bridge’s secondary and
subordinate bus registers: ignore.
(device = 1Fh, function = 7h)
request):Ignore
= 1Fh, function = 7h):
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
09/25/03 Revision 1.09
PI7C7300A