PI7C7300ANAE Pericom Semiconductor, PI7C7300ANAE Datasheet - Page 69

• Manufacturer Part Number: PI7C7300ANAE
• Description: IC PCI-PCI BRIDGE 3PORT 272-BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C7300ANAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 272-PBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13
13.1
duration of S1_RESET# (S2_RESET#) assertion. All posted write and delayed
transaction data buffers are reset. Therefore, any transactions residing inside the buffers
at the time of secondary reset are discarded.
When S1_RESET# or S2_RESET# is asserted by means of the secondary reset bit,
PI7C7300A remains accessible during secondary interface reset and continues to respond
to accesses to its configuration space from the primary interface.
SUPPORTED COMMANDS
The PCI command set is given below for the primary and secondary interfaces.
PRIMARY INTERFACE
P_CBE [3:0] #
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
Command
Interrupt
Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Memory Write
Reserved
Reserved
Configuration Read
Configuration Write
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Action
Ignore
Do not claim. Ignore.
1.
2.
Same as I/O Read.
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1.
2.
3.
Same as Memory Read.
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I. Type 0 Configuration Read:
If the bridge’s IDSEL line is asserted, perform function
decode and claim if target function is implemented.
Otherwise, ignore. If claimed, permit access to target
function’s configuration registers. Do not pass through
under any circumstances.
II. Type 1 Configuration Read:
1.
2.
3.
I. Type 0 Configuration Write: same as Configuration
II. Type 1 Configuration Write (not special cycle
1.
2.
3.
III. Configuration Write as Special Cycle Request
If address is within pass through I/O range, claim and
pass through.
Otherwise, do not pass through and do not claim for
internal access.
If address is within pass through memory range, claim
and pass through.
If address is within pass through memory mapped I/O
range, claim and pass through.
Otherwise, do not pass through and do not claim for
internal access.
If the target bus is the bridge’s secondary bus: claim
and pass through as a Type 0 Configuration Read.
If the target bus is a subordinate bus that exists behind
the bridge (but not equal to the secondary bus): claim
and pass through as a Type 1 Configuration Read.
Otherwise, ignore.
If the target bus is the bridge’s secondary bus: claim
and pass through as a Type 0 Configuration Write
If the target bus is a subordinate bus that exists behind
the bridge (but not equal to the secondary bus): claim
and pass through unchanged as a Type 1 Configuration
Write.
Otherwise, ignore.
Read.
request):
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
09/25/03 Revision 1.09
PI7C7300A