PI7C7300DNAE Pericom Semiconductor, PI7C7300DNAE Datasheet - Page 28

IC PCI-PCI BRIDGE 3PORT 272-BGA

PI7C7300DNAE

Manufacturer Part Number
PI7C7300DNAE
Description
IC PCI-PCI BRIDGE 3PORT 272-BGA
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI7C7300DNAE

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
272-PBGA
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
660 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI7C7300DNAE
Manufacturer:
Pericom
Quantity:
135
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PI7C7300DNAE
Manufacturer:
MAX
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5 510
Part Number:
PI7C7300DNAE
Manufacturer:
Pericom
Quantity:
10 000
4.7.3
Pericom Semiconductor
Non-prefetchable behavior is used for I/O and configuration read transactions, as well as
for memory read transactions that fall into non-prefetchable memory space.
If extra read transactions could have side effects, for example, when accessing a FIFO,
use non-prefetchable read transactions to those locations. Accordingly, if it is important
to retain the value of the byte enable bits during the data phase, use non-prefetchable
read transactions. If these locations are mapped in memory space, use the memory read
command and map the target into non-prefetchable (memory-mapped I/O) memory space
to use non-prefetching behavior.
READ PREFETCH ADDRESS BOUNDARIES
PI7C7300D imposes internal read address boundaries on read pre-fetched data. When a
read transaction reaches one of these aligned address boundaries, the PI7C7300D stops
pre-fetched data, unless the target signals a target disconnect before the read pre-fetched
boundary is reached. When PI7C7300D finishes transferring this read data to the
initiator, it returns a target disconnect with the last data transfer, unless the initiator
completes the transaction before all pre-fetched read data is delivered. Any leftover pre-
fetched data is discarded.
Prefetchable read transactions in flow-through mode pre-fetch to the nearest aligned 4KB
address boundary, or until the initiator de-asserts FRAME#. Section 4.7.6 describes flow-
through mode during read operations.
Page 28 of 107
3-PORT PCI-TO-PCI BRIDGE
November 2005 - Revision 1.01
PI7C7300D

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