PI7C7300DNAE Pericom Semiconductor, PI7C7300DNAE Datasheet - Page 5

IC PCI-PCI BRIDGE 3PORT 272-BGA

PI7C7300DNAE

Manufacturer Part Number
PI7C7300DNAE
Description
IC PCI-PCI BRIDGE 3PORT 272-BGA
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI7C7300DNAE

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
272-PBGA
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
660 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI7C7300DNAE
Manufacturer:
Pericom
Quantity:
135
Part Number:
PI7C7300DNAE
Manufacturer:
MAX
Quantity:
5 510
Part Number:
PI7C7300DNAE
Manufacturer:
Pericom
Quantity:
10 000
TABLE OF CONTENTS
1
2
3
4
5
Pericom Semiconductor
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
4.10
INTRODUCTION ............................................................................................................................ 11
BLOCK DIAGRAM......................................................................................................................... 12
SIGNAL DEFINITIONS ................................................................................................................. 13
PCI BUS OPERATION ................................................................................................................... 21
4.6.1
4.6.2
4.6.3
4.6.4
4.6.5
4.6.6
4.7.1
4.7.2
4.7.3
4.7.4
4.7.5
4.7.6
4.7.7
4.8.1
4.8.2
4.8.3
4.8.4
4.9.1
4.9.2
4.9.3
4.9.4
ADDRESS DECODING .................................................................................................................. 42
SIGNAL TYPES ........................................................................................................................ 13
PRIMARY BUS INTERFACE SIGNALS ................................................................................ 13
SECONDARY BUS INTERFACE SIGNALS .......................................................................... 15
CLOCK SIGNALS..................................................................................................................... 17
MISCELLANEOUS SIGNALS ................................................................................................. 17
COMPACT PCI HOT-SWAP SIGNALS .................................................................................. 17
JTAG BOUNDARY SCAN SIGNALS ..................................................................................... 18
POWER AND GROUND .......................................................................................................... 18
PI7C7300D PBGA PIN LIST .................................................................................................... 18
TYPES OF TRANSACTIONS .................................................................................................. 21
SINGLE ADDRESS PHASE ..................................................................................................... 22
DUAL ADDRESS PHASE ........................................................................................................ 22
DEVICE SELECT (DEVSEL#) GENERATION ...................................................................... 23
DATA PHASE ........................................................................................................................... 23
WRITE TRANSACTIONS ........................................................................................................ 23
READ TRANSACTIONS.......................................................................................................... 27
CONFIGURATION TRANSACTIONS.................................................................................... 33
TRANSACTION TERMINATION ........................................................................................... 37
CONCURRENT MODE OPERATION..................................................................................... 42
MEMORY WRITE TRANSACTIONS.................................................................................. 24
MEMORY WRITE AND INVALIDATE TRANSACTIONS.................................................. 25
DELAYED WRITE TRANSACTIONS ................................................................................. 25
WRITE TRANSACTION ADDRESS BOUNDARIES .......................................................... 26
BUFFERING MULTIPLE WRITE TRANSACTIONS......................................................... 26
FAST BACK-TO-BACK WRITE TRANSACTIONS ............................................................ 27
PREFETCHABLE READ TRANSACTIONS....................................................................... 27
NON-PREFETCHABLE READ TRANSACTIONS ............................................................. 27
READ PREFETCH ADDRESS BOUNDARIES.................................................................. 28
DELAYED READ REQUESTS ........................................................................................... 30
DELAYED READ COMPLETION WITH TARGET ........................................................... 30
DELAYED READ COMPLETION ON INITIATOR BUS................................................... 32
FAST BACK-TO-BACK READ TRANSACTION................................................................ 32
TYPE 0 ACCESS TO PI7C7300D ...................................................................................... 33
TYPE 1 TO TYPE 0 CONVERSION ................................................................................... 34
TYPE 1 TO TYPE 1 FORWARDING.................................................................................. 35
SPECIAL CYCLES ............................................................................................................. 36
MASTER TERMINATION INITIATED BY PI7C7300D..................................................... 37
MASTER ABORT RECEIVED BY PI7C7300D.................................................................. 38
TARGET TERMINATION RECEIVED BY PI7C7300D..................................................... 38
TARGET TERMINATION INITIATED BY PI7C7300D..................................................... 41
Page 5 of 107
3-PORT PCI-TO-PCI BRIDGE
November 2005 - Revision 1.01
PI7C7300D

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