PI7C7300DNAE Pericom Semiconductor, PI7C7300DNAE Datasheet - Page 79

• Manufacturer Part Number: PI7C7300DNAE
• Description: IC PCI-PCI BRIDGE 3PORT 272-BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C7300DNAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 272-PBGA
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 660 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.1.9
14.1.10
14.1.11
14.1.12
14.1.13
Pericom Semiconductor
HEADER TYPE REGISTER – OFFSET 0Ch
Configuration Register 1
Configuration Register 2
PRIMARY BUS NUMBER REGISTER – OFFSET 18h
SECONDARY (S1 or S2) BUS NUMBER REGISTER – OFFSET 18h
SUBORDINATE (S1 or S2) BUS NUMBER REGISTER – OFFSET
18h
SECONDARY LATENCY TIMER REGISTER – OFFSET 18h
Bit
23:16
Bit
23:16
Bit
7:0
Bit
15:8
Bit
23:16
Bit
31:24
Header Type
Header Type
Function
Function
Function
Primary Bus
Number
Function
Secondary (S1 or
S2) Bus Number
Function
Subordinate
(S1 or S2) Bus
Number
Function
Secondary
Latency Timer
Type
R/O
Type
R/O
Type
R/W
Type
R/W
Type
R/W
Type
R/W
Page 79 of 107
Description
Read as 81h to designate function 0 (multiple function PCI-to-PCI
bridge for secondary bus S1)
Description
Read as 01h to designate function 1 (single function PCI-to-PCI
bridge for secondary bus S2)
Description
Indicates the number of the PCI bus to which the primary interface
is connected. The value is set in software during configuration.
Reset to 0
Description
Indicates the number of the PCI bus to which the secondary
interface (S1 or S2) is connected. The value is set in software
during configuration.
Reset to 0
Description
Indicates the number of the PCI bus with the highest number that is
subordinate to the bridge. The value is set in software during
configuration.
Reset to 0
Description
Designated in units of PCI bus clocks. Latency timer checks for
master accesses on the secondary bus interfaces that remain
unclaimed by any target.
Reset to 0
3-PORT PCI-TO-PCI BRIDGE
November 2005 - Revision 1.01
PI7C7300D