MC68HC705X32CFU Freescale Semiconductor, MC68HC705X32CFU Datasheet - Page 139

• Manufacturer Part Number: MC68HC705X32CFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC705X32CFU

• Cpu Family: HC05
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 528Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

10.1.4.1
The STOP instruction is inhibited when the watchdog system is enabled. If a STOP instruction is
executed while the watchdog system is enabled, then a watchdog reset will occur as if there were
a watchdog timeout. In the case of a watchdog reset due to a STOP instruction, the oscillator will
not be affected, thus there will be no t
configured according to the user specified mask option.
10.1.4.2
The state of the watchdog during WAIT mode is selected via a mask option (see
be one of the options below:
Watchdog enabled — the watchdog counter will continue to operate during WAIT mode and a reset
will occur after time t
Watchdog disabled — on entering WAIT mode, the watchdog counter system is reset and
disabled. On exiting WAIT mode the counter resumes normal operation.
10.1.5
When processing stops within the MCU for any reason, i.e. power-on reset, external reset or the
execution of a STOP or WAIT instruction, various internal functions of the MCU are affected.
Table 10-1
in which they occur.
Note:
MC68HC05X16
Reset action on individual MCAN registers is described in
summarised in
shows the resulting action of any type of system reset, but not necessarily in the order
COP watchdog during STOP mode
COP watchdog during WAIT mode
Functions affected by reset
Freescale Semiconductor, Inc.
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Table
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3-2.
RESETS AND INTERRUPTS
PORL
cycles start-up delay. On start-up, the watchdog will be
Section 5
Section
and is also
1.2) to
10-5
10