MC68HC705X32CFU Freescale Semiconductor, MC68HC705X32CFU Datasheet - Page 76

MC68HC705X32CFU

Manufacturer Part Number
MC68HC705X32CFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC705X32CFU

Cpu Family
HC05
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI
Program Memory Type
EPROM
Program Memory Size
32KB
Total Internal Ram Size
528Byte
# I/os (max)
32
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
PQFP
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705X32CFU4
Manufacturer:
FREESCALE
Quantity:
20 000
5
5.3.6
The acceptance mask register specifies which of the corresponding bits in the acceptance code
register are relevant for acceptance filtering.
Note:
AM0 – AM7 — Acceptance mask bits
When a particular bit in this register is clear this indicates that the corresponding bit in the
acceptance code register must be the same as its identifier bit, before a match will be detected.
The message will be accepted if all such bits match. When a bit is set, it indicates that the state of
the corresponding bit in the acceptance code register will not affect whether or not the message
is accepted.
5.3.7
Note:
SJW1, SJW0 — Synchronization jump width bits
The synchronization jump width defines the maximum number of system clock (t
which a bit may be shortened, or lengthened, to achieve resynchronization on data transitions on
the bus (see
MCAN acceptance mask (CACM)
MCAN bus timing 0 (CBT0)
1 (set)
0 (clear) –
This register can only be accessed when the reset request bit in the CCNTRL register
is set.
This register can only be accessed when the reset request bit in the CCNTRL register
is set.
Table
MCAN acceptance mask register (CACM)
MCAN bus timing register 0 (CBT0)
5-1).
Freescale Semiconductor, Inc.
Ignore corresponding acceptance code register bit.
Match corresponding acceptance code register and identifier bits.
For More Information On This Product,
Address
Address
MOTOROLA CAN MODULE (MCAN)
$0025
$0026
Go to: www.freescale.com
SJW1 SJW0
AM7
bit 7
bit 7
AM6
bit 6
bit 6
BRP5
AM5
bit 5
bit 5
BRP4 BRP3 BRP2 BRP1 BRP0 Undefined
AM4
bit 4
bit 4
AM3
bit 3
bit 3
AM2
bit 2
bit 2
AM1
bit 1
bit 1
MC68HC05X16
SCL
AM0
bit 0
bit 0
) cycles by
Undefined
on reset
on reset
State
State
Rev. 1

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