C8051F502-IMR Silicon Laboratories Inc, C8051F502-IMR Datasheet - Page 198

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C8051F502-IMR

Manufacturer Part Number
C8051F502-IMR
Description
MCU 8-Bit C8051F50x 8051 CISC 64KB Flash 2.5V/3.3V/5V 32-Pin QFN EP T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F502-IMR

Package
32QFN EP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Ram Size
4.25 KB
Program Memory Size
64 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
25
Interface Type
I2C/SPI/UART
On-chip Adc
32-chx12-bit
Operating Temperature
-40 to 125 °C
Number Of Timers
4

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C8051F50x/F51x
SFR Definition 20.25. P3MDIN: Port 3 Input Mode
SFR Address = 0xF4; SFR Page = 0x0F
SFR Definition 20.26. P3MDOUT: Port 3 Output Mode
SFR Address = 0xAE; SFR Page = 0x0F
198
Note: Port P3.1–P3.7 are only available on the 48-pin and 40-pin packages.
Note: Port P3.1–P3.7 are only available on the and 40-pin 48-pin packages.
Name
Reset
Name
Reset
7:0
7:0 P3MDOUT[7:0] Output Configuration Bits for P3.7–P3.0 (respectively).
Bit
Bit
Type
Type
Bit
Bit
P3MDIN[7:0]
Name
Name
7
1
7
0
Analog Configuration Bits for P3.7–P3.0 (respectively).
Port pins configured for analog mode have their weak pull-up and digital receiver
disabled. For analog mode, the pin also needs to be configured for open-drain
mode in the P3MDOUT register.
0: Corresponding P3.n pin is configured for analog mode.
1: Corresponding P3.n pin is not configured for analog mode.
These bits are ignored if the corresponding bit in register P3MDIN is logic 0.
0: Corresponding P3.n Output is open-drain.
1: Corresponding P3.n Output is push-pull.
6
1
6
0
5
1
5
0
Rev. 1.2
P3MDOUT[7:0]
4
1
4
0
P3MDIN[7:0]
R/W
R/W
Function
Function
3
1
3
0
2
1
2
0
1
1
1
0
0
1
0
0

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