C8051F502-IMR Silicon Laboratories Inc, C8051F502-IMR Datasheet - Page 4

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C8051F502-IMR

Manufacturer Part Number
C8051F502-IMR
Description
MCU 8-Bit C8051F50x 8051 CISC 64KB Flash 2.5V/3.3V/5V 32-Pin QFN EP T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F502-IMR

Package
32QFN EP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Ram Size
4.25 KB
Program Memory Size
64 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
25
Interface Type
I2C/SPI/UART
On-chip Adc
32-chx12-bit
Operating Temperature
-40 to 125 °C
Number Of Timers
4

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C8051F50x/F51x
13. Special Function Registers................................................................................. 100
14. Interrupts .............................................................................................................. 117
15. Flash Memory....................................................................................................... 129
16. Power Management Modes................................................................................. 138
17. Reset Sources ...................................................................................................... 141
18. External Data Memory Interface and On-Chip XRAM ....................................... 147
4
13.1. SFR Paging ................................................................................................... 100
13.2. Interrupts and SFR Paging ............................................................................ 100
13.3. SFR Page Stack Example ............................................................................. 101
14.1. MCU Interrupt Sources and Vectors.............................................................. 117
14.2. Interrupt Register Descriptions ...................................................................... 120
14.3. External Interrupts INT0 and INT1................................................................. 126
15.1. Programming the Flash Memory ................................................................... 129
15.2. Non-volatile Data Storage ............................................................................. 131
15.3. Security Options ............................................................................................ 131
15.4. Flash Write and Erase Guidelines ................................................................. 133
16.1. Idle Mode....................................................................................................... 138
16.2. Stop Mode ..................................................................................................... 139
16.3. Suspend Mode .............................................................................................. 139
17.1. Power-On Reset ............................................................................................ 142
17.2. Power-Fail Reset/VDD Monitor ..................................................................... 142
17.3. External Reset ............................................................................................... 144
17.4. Missing Clock Detector Reset ....................................................................... 144
17.5. Comparator0 Reset ....................................................................................... 145
17.6. PCA Watchdog Timer Reset ......................................................................... 145
17.7. Flash Error Reset .......................................................................................... 145
17.8. Software Reset .............................................................................................. 145
18.1. Accessing XRAM........................................................................................... 147
18.2. Configuring the External Memory Interface ................................................... 148
18.3. Port Configuration.......................................................................................... 148
18.4. Multiplexed and Non-multiplexed Selection................................................... 153
14.1.1. Interrupt Priorities.................................................................................. 118
14.1.2. Interrupt Latency ................................................................................... 118
15.1.1. Flash Lock and Key Functions .............................................................. 129
15.1.2. Flash Erase Procedure ......................................................................... 129
15.1.3. Flash Write Procedure .......................................................................... 130
15.1.4. Flash Write Optimization ....................................................................... 130
15.4.1. V
15.4.2. PSWE Maintenance .............................................................................. 133
15.4.3. System Clock ........................................................................................ 134
18.1.1. 16-Bit MOVX Example .......................................................................... 147
18.1.2. 8-Bit MOVX Example ............................................................................ 147
18.4.1. Multiplexed Configuration...................................................................... 153
18.4.2. Non-multiplexed Configuration.............................................................. 154
12.2.1.3. Stack ............................................................................................ 99
DD
Maintenance and the V
Rev. 1.2
DD
monitor ................................................ 133

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