AT32UC3A4128S Atmel Corporation, AT32UC3A4128S Datasheet - Page 155

• Manufacturer Part Number: AT32UC3A4128S
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A4128S

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: AES
• Sram (kbytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.5.1
Name:
Access Type:
Offset:
Reset Value:
•
32072G–11/2011
ULBT: Undefined Length Burst Type
31
23
15
–
–
–
7
–
0: Infinite Length Burst
No predicted end of burst is generated and therefore INCR bursts coming from this master cannot be broken.
1: Single Access
The undefined length burst is treated as a succession of single accesses, allowing re-arbitration at each beat of the INCR burst.
2: Four Beat Burst
The undefined length burst is split into a four-beat burst, allowing re-arbitration at each four-beat burst end.
3: Eight Beat Burst
The undefined length burst is split into an eight-beat burst, allowing re-arbitration at each eight-beat burst end.
4: Sixteen Beat Burst
The undefined length burst is split into a sixteen-beat burst, allowing re-arbitration at each sixteen-beat burst end.
Master Configuration Registers
30
22
14
MCFG0...MCFG15
Read/Write
0x00 - 0x3C
0x00000002
–
–
–
6
–
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
ULBT
25
17
–
–
9
–
1
24
16
–
–
8
–
0
155