AT32UC3L0128 Atmel Corporation, AT32UC3L0128 Datasheet - Page 148

• Manufacturer Part Number: AT32UC3L0128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0128

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

11.7
11.7.1
32145A–12/2011
Module Configuration
Interrupt Request Signal Map
The specific configuration for each INTC instance is listed in the following tables.The module
bus clocks listed here are connected to the system bus clocks. Please refer to the Power Man-
ager chapter for details.
Table 11-2.
The Interrupt Controller supports up to 64 groups of interrupt requests. Each group can have up
to 32 interrupt request signals. All interrupt signals in the same group share the same autovector
address and priority level.
The table below shows how the interrupt request signals are connected to the INTC.
Table 11-3.
Module Name
INTC
Group
0
1
2
3
4
5
6
7
8
9
INTC Clock Name
Interrupt Request Signal Map
Clock Name
CLK_INTC
Line
0
0
1
0
0
0
1
2
3
0
1
2
3
0
1
2
3
0
0
0
Module
AVR32UC3 CPU
AVR32UC3 CPU
AVR32UC3 CPU
Flash Controller
Secure Access Unit
Peripheral DMA Controller
Peripheral DMA Controller
Peripheral DMA Controller
Peripheral DMA Controller
Peripheral DMA Controller
Peripheral DMA Controller
Peripheral DMA Controller
Peripheral DMA Controller
Peripheral DMA Controller
Peripheral DMA Controller
Peripheral DMA Controller
Peripheral DMA Controller
Power Manager
System Control Interface
Asynchronous Timer
Description
Clock for the INTC bus interface
AT32UC3L0128/256
OCD DCEMU_DIRTY
SYSREG COMPARE
OCD DCCPU_READ
AST ALARM
FLASHCDW
PDCA 10
PDCA 11
PDCA 0
PDCA 1
PDCA 2
PDCA 3
PDCA 4
PDCA 5
PDCA 6
PDCA 7
PDCA 8
PDCA 9
Signal
SCIF
SAU
PM
148