AT32UC3L0128 Atmel Corporation, AT32UC3L0128 Datasheet - Page 237

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AT32UC3L0128

Manufacturer Part Number
AT32UC3L0128
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3L0128

Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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13.6.24
Name:
Access Type:
Reset Value:
There is one GCCTRL register per generic clock in the design.
• DIV: Division Factor
• OSCSEL: Oscillator Select
• DIVEN: Divide Enable
• CEN: Clock Enable
32145A–12/2011
31
23
15
7
-
-
The number of DIV bits for each generic clock is as shown in the “Generic Clock number of DIV bits” table in the SCIF Module
Configuration section.
Selects the source clock for the generic clock. Please refer to the “Generic Clock Sources” table in the SCIF Module
Configuration section.
0: The generic clock equals the undivided source clock.
1: The generic clock equals the source clock divided by 2*(DIV+1).
0: The generic clock is disabled.
1: The generic clock is enabled.
Generic Clock Control
30
22
14
6
-
-
GCCTRL
Read/Write
0x00000000
29
21
13
5
-
-
28
20
12
4
-
DIV[15:8]
DIV[7:0]
27
19
11
3
-
OSCSEL[4:0]
26
18
10
2
-
AT32UC3L0128/256
DIVEN
25
17
9
1
CEN
24
16
8
0
237

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