AT32UC3L0128 Atmel Corporation, AT32UC3L0128 Datasheet - Page 641

• Manufacturer Part Number: AT32UC3L0128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0128

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

27.5
27.5.1
27.5.2
27.5.3
32145A–12/2011
Product Dependencies
I/O Lines
Power Management
Clocks
Table 27-2.
The signal names corresponds to the groups A and B of analog comparators. For normal mode,
the mapping from input signal names in the block diagram to the signal names is given in
27-3.
Table 27-3.
In order to use this module, other parts of the system must be configured correctly, as described
below.
The ACIFB pins are multiplexed with other peripherals. The user must first program the I/O Con-
troller to give control of the pins to the ACIFB.
If the CPU enters a sleep mode that disables clocks used by the ACIFB, the ACIFB will stop
functioning and resume operation after the system wakes up from sleep mode.
The clock for the ACIFB bus interface (CLK_ACIFB) is generated by the Power Manager. This
clock is enabled at reset, and can be disabled in the Power Manager. It is recommended to dis-
able the ACIFB before disabling the clock, to avoid freezing the ACIFB in an undefined state.
The ACIFB uses a GCLK as clock source for the Analog Comparators. The user must set up this
GCLK at the right frequency. The CLK_ACIFB clock of the interface must be at least 4x the
GCLK frequency used in the comparators. The GCLK is used both for measuring the startup
time of a comparator, and to give a frequency for the comparisons done in Continuous Measure-
ment Mode, see
Refer to the Electrical Characteristics chapter for GCLK frequency limitations.
ACAP0/ACAN0
ACBP0/ACBN0
ACAP1/ACAN1
ACBP1/ACBN1
ACAP2/ACAN2
ACBP2/ACBN2
ACAP3/ACAN3
ACBP3/ACBN3
Pin Name
ACREFN
Pin Name
ACBPn
ACBNn
I/O Line Description
Signal Name Mapping
Section
Reference Voltage for all comparators selectable for INN
27.6.
Channel Number
Negative reference pin for Analog Comparator B n
Positive reference pin for Analog Comparator B n
0
1
2
3
4
5
6
7
Pin Description
Normal Mode
ACP0/ACN0
ACP1/ACN1
ACP2/ACN2
ACP3/ACN3
ACP4/ACN4
ACP5/ACN5
ACP6/ACN6
ACP7/ACN7
AT32UC3L0128/256
Analog
Analog
Analog
Type
Table
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