AT32UC3L0128 Atmel Corporation, AT32UC3L0128 Datasheet - Page 272

• Manufacturer Part Number: AT32UC3L0128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0128

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.6
Table 14-1.
Note:
32145A–12/2011
Offset
0xFC
0x0C
0x1C
0x4C
0xF0
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x30
0x34
0x40
0x44
0x48
0x50
0x54
User Interface
1. The reset values are device specific. Please refer to the Module Configuration section at the end of this chapter.
2. The number of Alarm and Periodic Interval registers are device specific. Please refer to the Module Configuration section at
the end of this chapter.
AST Register Memory Map
Periodic Interval Register 0
Periodic Interval Register 1
Interrupt Disable Register
Interrupt Enable Register
Interrupt Mask Register
Clock Control Register
Wake Enable Register
Status Clear Register
Digital Tuner Register
Parameter Register
Alarm Register 0
Alarm Register 1
Version Register
Control Register
Status Register
Calendar Value
Counter Value
Event Disable
Event Enable
Event Mask
Register
(2)
(2)
(2)
(2)
Register Name
PARAMETER
VERSION
CLOCK
CALV
WER
PIR0
PIR1
SCR
EVD
EVM
AR0
AR1
DTR
EVE
IMR
IDR
IER
CR
SR
CV
AT32UC3L0128/256
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/write
Read-only
Read-only
Read-only
Read-only
Read-only
Write-only
Write-only
Write-only
Write-only
Write-only
Access
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
-
-
(1)
(1)
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