AT32UC3L0128 Atmel Corporation, AT32UC3L0128 Datasheet - Page 625

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AT32UC3L0128

Manufacturer Part Number
AT32UC3L0128
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3L0128

Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
4
Lin
4
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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26.9.6
Name:
Access Type:
Offset:
Reset Value:
• EN: Enable Status
• CELSE: Compare Else Status
• CGT: Compare Greater Than Status
• CLT: Compare Lesser Than Status
• BUSY: Busy Status
• READY: Ready Status
• NOCNT: No Contact Status
• PENCNT: Pen Contact Status
32145A–12/2011
31
23
15
7
-
-
-
-
0: The ADCIFB is disabled.
1: The ADCIFB is enabled.
This bit is cleared when CR.DIS is written to one.
This bit is set when CR.EN is written to one.
This bit is cleared when either CLT or CGT are detected or when analog compare is disabled.
This bit is set when no CLT or CGT are detected on the last converted data and analog compare is enabled.
This bit is cleared when no compare greater than CVR.HV is detected on the last converted data or when analog compare is
disabled.
This bit is set when compare greater than CVR.HV is detected on the last converted data and analog compare is enabled.
This bit is cleared when no compare lesser than CVR.LV is detected on the last converted data or when analog compare is
disabled.
This bit is set when compare lesser than CVR.LV is detected on the last converted data and analog compare is enabled.
This bit is cleared when the ADCIFB is ready to perform a conversion sequence.
This bit is set when the ADCIFB is busy performing a convention sequence.
This bit is cleared when the ADCIFB is busy performing a conversion sequence
This bit is set when the ADCIFB is ready to perform a conversion sequence.
This bit is cleared when no contact loss is detected or pen detect is disabled
This bit is set when contact loss is detected and pen detect is enabled.
This bit is cleared when no contact is detected or pen detect is disabled.
Status Register
CELSE
30
22
14
6
-
-
-
SR
Read-only
0x14
0x00000000
NOCNT
CGT
29
21
13
5
-
-
PENCNT
CLT
28
20
12
4
-
-
27
19
11
3
-
-
-
-
26
18
10
2
-
-
-
-
AT32UC3L0128/256
OVRE
BUSY
25
17
9
1
-
-
READY
DRDY
EN
24
16
8
0
-
625

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