ATmega32M1 Atmel Corporation, ATmega32M1 Datasheet - Page 177

• Manufacturer Part Number: ATmega32M1
• Manufacturer: Atmel Corporation

Specifications of ATmega32M1

• Flash (kbytes): 32 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 14
• Input Capture Channels: 1
• Pwm Channels: 10
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

19.8
19.8.1
19.8.2
8209D–AVR–11/10
Error Management
Fault Confinement
Error Types
The CAN channel may be in one of the three following states:
For fault confinement, a transmit error counter (TEC) and a receive error counter (REC) are
implemented. BOFF and ERRP bits give the information of the state of the CAN channel. Setting
BOFF to one may generate an interrupt.
Figure 19-12. Line Error Mode
Note:
• Error active (default):
• Error passive:
• Bus off:
• BERR: Bit error. The bit value which is monitored is different from the bit value sent
• SERR: Stuff error. Detection of more than five consecutive bit with the same polarity
• CERR: CRC error (Rx only). The receiver performs a CRC check on every destuffed received
• FERR: Form error. The form error results from one (or more) violations of the fixed form of
The CAN channel takes part in bus communication and can send an active error frame when
the CAN macro detects an error.
The CAN channel cannot send an active error frame. It takes part in bus communication, but
when an error is detected, a passive error frame is sent. Also, after a transmission, an error
passive unit will wait before initiating further transmission.
The CAN channel is not allowed to have any influence on the bus.
message from the start of frame up to the data field. If this checking does not match with the
destuffed CRC field, an CRC error is set
the following bit fields:
– CRC delimiter
– acknowledgement delimiter
Note:
More than one REC/TEC change may apply during a given message transfer
Exceptions:
- Recessive bit sent monitored as dominant bit during the arbitration field and the acknowl-
edge slot
- Detecting a dominant bit during the sending of an error frame
ERRP = 1
BOFF = 0
Passive
Error
TEC > 127 or
REC > 127
ERRP = 0
BOFF = 0
TEC < 127 and
REC < 127
ATmega16M1/32M1/64M1
interrupt - BOFFIT
TEC > 255
Active
Error
Reset
ERRP = 0
BOFF = 1
of 11 consecutive
128 occurrences
recessive bit
Bus
Off
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