ATmega32M1 Atmel Corporation, ATmega32M1 Datasheet - Page 6

• Manufacturer Part Number: ATmega32M1
• Manufacturer: Atmel Corporation

Specifications of ATmega32M1

• Flash (kbytes): 32 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 14
• Input Capture Channels: 1
• Pwm Channels: 10
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

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Block Diagram
ATmega16M1/32M1/64M1
Figure 2-1.
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
The ATmega16M1/32M1/64M1 provides the following features: 16/32/64K bytes of In-System
Programmable Flash with Read-While-Write capabilities, 512B/1K/2K bytes EEPROM,
1/2/4K bytes SRAM, 27 general purpose I/O lines, 32 general purpose working registers, one
Motor Power Stage Controller, two flexible Timer/Counters with compare modes and PWM, one
UART with HW LIN, an 11-channel 10-bit ADC with two differential input stages with program-
mable gain, a 10-bit DAC, a programmable Watchdog Timer with Internal Individual Oscillator,
an SPI serial port, an On-chip Debug system and four software selectable power saving modes.
Block Diagram
Flash Program
Control Lines
Instruction
Instruction
Memory
Decoder
Register
Program
Counter
Current Source
and Control
EEPROM
Registrers
I/O Lines
Purpose
General
SRAM
Data Bus 8-bit
Status
32 x 8
Data
ALU
HW LIN/UART
Comparators
8209D–AVR–11/10
Watchdog
Interrupt
Timer
Timer 0
4 Analog
Timer 1
MPSC
ADC
Unit
Unit
DAC
SPI
CAN