ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 160
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ATxmega32D4
Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega32D4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega32D4-AU
Manufacturer:
Atmel
Quantity:
123
Part Number:
ATxmega32D4-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega32D4-CU
Manufacturer:
Maxim
Quantity:
71
Company:
Part Number:
ATxmega32D4-MH
Manufacturer:
Atmel
Quantity:
1 910
Company:
Part Number:
ATxmega32D4-MH
Manufacturer:
Atmel
Quantity:
1 704
Part Number:
ATxmega32D4-MH
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
14.7.10
14.7.11
8210B–AVR–04/10
DTHSBUF - Dead-Time High Side Buffer Register
OUTOVEN - Output Override Enable Register
• Bit 7:0 - DTHSBUF: Dead-Time High Side Buffer
This register is the buffer for the DTHS Register. If double buffering is used, valid contents in this
register is copied to the DTHS Register on an UPDATE condition.
Note:
• Bit 7:0 - OUTOVEN[7:0]: Output Override Enable
These bits enable override of corresponding port output register (i.e. one-to-one bit relation to
pin position). The port direction is not overridden
Bit
+0x0B
Read/Write
Initial Value
Bit
+0x0C
Read/Write
Initial Value
1. Can only be written if the fault detect flag (FDF) is zero.
R/W
R/W
7
0
7
0
(1)
R/W
R/W
6
0
6
0
(1)
R/W
R/W
5
0
5
0
(1)
R/W
R/W
4
0
4
0
DTHSBUF[7:0]
OUTOVEN[7:0]
(1)
R/W
R/W
3
0
3
0
(1)
R/W
R/W
2
0
2
0
(1)
R/W
R/W
1
0
1
0
(1)
XMEGA D
R/W
R/W
0
0
0
0
(1)
DTHSBUF
OUTOVEN
160