ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 305

• Manufacturer Part Number: ATxmega32D4
• Manufacturer: Atmel Corporation

Specifications of ATxmega32D4

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Speed: No
• Usb Interface: No
• Spi: 4
• Twi (i2c): 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 14
• Input Capture Channels: 14
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8210B–AVR–04/10
13 Hi-Res - High Resolution Extension ................................................... 148
14 AWeX – Advanced Waveform Extension ........................................... 150
15 RTC - Real Time Counter ..................................................................... 162
16 TWI – Two Wire Interface .................................................................... 169
12.12
12.13
13.1
13.2
13.3
13.4
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.8
15.1
15.2
15.3
15.4
15.5
16.1
16.2
16.3
16.4
16.5
16.6
16.7
16.8
16.9
16.10
16.11
16.12
Register Summary .........................................................................................147
Interrupt Vector Summary .............................................................................147
Features ........................................................................................................148
Overview ........................................................................................................148
Register Description ......................................................................................149
Register Summary .........................................................................................149
Features ........................................................................................................150
Overview ........................................................................................................150
Port Override .................................................................................................151
Dead Time Insertion ......................................................................................153
Pattern Generation ........................................................................................154
Fault Protection .............................................................................................155
Register Description ......................................................................................156
Register Summary .........................................................................................161
Features ........................................................................................................162
Overview ........................................................................................................162
Register Description ......................................................................................163
Register Summary .........................................................................................168
Interrupt Vector Summary .............................................................................168
Features ........................................................................................................169
Overview ........................................................................................................169
General TWI Bus Concepts ...........................................................................170
TWI Bus State Logic ......................................................................................176
TWI Master Operation ...................................................................................177
TWI Slave Operation .....................................................................................179
Enabling External Driver Interface .................................................................180
Register Description - TWI ............................................................................181
Register Description - TWI Master ................................................................181
Register Description - TWI Slave ..................................................................187
Register Summary - TWI ...............................................................................192
Register Summary - TWI Master ...................................................................192
XMEGA D
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