ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 296
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ATxmega32D4
Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega32D4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega32D4-AU
Manufacturer:
Atmel
Quantity:
123
Part Number:
ATxmega32D4-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega32D4-CU
Manufacturer:
Maxim
Quantity:
71
Company:
Part Number:
ATxmega32D4-MH
Manufacturer:
Atmel
Quantity:
1 910
Company:
Part Number:
ATxmega32D4-MH
Manufacturer:
Atmel
Quantity:
1 704
Part Number:
ATxmega32D4-MH
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
25. Instruction Set Summary
8210B–AVR–04/10
Mnemonics
ADD
ADC
ADIW
SUB
SUBI
SBC
SBCI
SBIW
AND
ANDI
OR
ORI
EOR
COM
NEG
SBR
CBR
INC
DEC
TST
CLR
SER
MUL
MULS
MULSU
FMUL
FMULS
FMULSU
DES
RJMP
IJMP
EIJMP
JMP
RCALL
ICALL
EICALL
Operands
Rd, Rr
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd
Rd
Rd,K
Rd,K
Rd
Rd
Rd
Rd
Rd
Rd,Rr
Rd,Rr
Rd,Rr
Rd,Rr
Rd,Rr
Rd,Rr
K
k
k
k
Description
Add without Carry
Add with Carry
Add Immediate to Word
Subtract without Carry
Subtract Immediate
Subtract with Carry
Subtract Immediate with Carry
Subtract Immediate from Word
Logical AND
Logical AND with Immediate
Logical OR
Logical OR with Immediate
Exclusive OR
One’s Complement
Two’s Complement
Set Bit(s) in Register
Clear Bit(s) in Register
Increment
Decrement
Test for Zero or Minus
Clear Register
Set Register
Multiply Unsigned
Multiply Signed
Multiply Signed with Unsigned
Fractional Multiply Unsigned
Fractional Multiply Signed
Fractional Multiply Signed with Unsigned
Data Encryption
Relative Jump
Indirect Jump to (Z)
Extended Indirect Jump to (Z)
Jump
Relative Call Subroutine
Indirect Call to (Z)
Extended Indirect Call to (Z)
Arithmetic and Logic Instructions
Branch Instructions
else if (H = 1) then R15:R0
if (H = 0) then R15:R0
Rd + 1:Rd
PC(21:16)
PC(21:16)
PC(21:16)
PC(21:16)
PC(15:0)
PC(15:0)
PC(15:0)
PC(15:0)
R1:R0
R1:R0
R1:R0
R1:R0
R1:R0
R1:R0
Operation
PC
PC
PC
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
Rd + Rr
Rd + Rr + C
Rd + 1:Rd + K
Rd - Rr
Rd - K
Rd - Rr - C
Rd - K - C
Rd + 1:Rd - K
Rd • Rr
Rd • K
Rd v Rr
Rd v K
Rd ⊕ Rr
$FF - Rd
$00 - Rd
Rd v K
Rd • ($FFh - K)
Rd + 1
Rd - 1
Rd • Rd
Rd ⊕ Rd
$FF
Rd x Rr (UU)
Rd x Rr (SS)
Rd x Rr (SU)
Rd x Rr<<1 (UU)
Rd x Rr<<1 (SS)
Rd x Rr<<1 (SU)
Encrypt(R15:R0, K)
Decrypt(R15:R0, K)
PC + k + 1
Z,
0
Z,
EIND
k
PC + k + 1
Z,
0
Z,
EIND
Flags
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,C,N,V,S
Z,C,N,V,S,H
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
None
Z,C
Z,C
Z,C
Z,C
Z,C
Z,C
None
None
None
None
None
None
None
XMEGA D
#Clocks
2 / 3
2 / 3
1/2
3
1
1
2
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
3
(1)
(1)
(1)
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