ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 280

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ATxmega32D4

Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega32D4

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Table 23-2.
Notes:
23.10.2.1
23.10.2.2
8210B–AVR–04/10
CMD[6:0]
0x00
Flash Page Buffer
0x23
0x26
Flash
0x2B
0x02E
0x2F
Application Section
0x20
0x22
0x24
0x25
Boot Loader Section
0x2A
0x2C
0x2D
User Signature Row
0x01
0x18
0x1A
Calibration Row
0x02
1. The Flash Range CRC command used byte addressing of the Flash.
2. Will depend on the flash section (Application or Boot Loader) that is actually addressed.
Group Configuration
NO_OPERATION
LOAD_FLASH_BUFFER
ERASE_FLASH_BUFFER
ERASE_FLASH_PAGE
WRITE_FLASH_PAGE
ERASE_WRITE_FLASH_PAGE
ERASE_APP
ERASE_APP_PAGE
WRITE_APP_PAGE
ERASE_WRITE_APP_PAGE
ERASE_BOOT_PAGE
WRITE_BOOT_PAGE
ERASE_WRITE_BOOT_PAGE
READ_USER_SIG_ROW
ERASE_USER_SIG_ROW
WRITE_USER_SIG_ROW
READ_CALIB_ROW
Read Flash
Erase Flash Page Buffer
Flash Self-Programming Commands
The (E)LPM instruction is used to read one byte from the Flash memory.
The destination register will be loaded during the execution of the LPM instruction.
The Erase Flash Page Buffer command is used to erase the Flash Page Buffer.
1. Load the Z-pointer with the byte address to read.
2. Load the NVM Command register (NVM CMD) with the No Operation command.
3. Execute the LPM instruction.
1. Load the NVM CMD with the Erase Flash Page Buffer command.
2. Set the Command Execute bit (NVMEX) in the NVM Control Register A (NVM CTRLA).
This requires the timed CCP sequence during self-programming.
Description
No Operation / Read Flash
Load Flash Page Buffer
Erase Flash Page Buffer
Erase Flash Page
Write Flash Page
Erase & Write Flash Page
Erase Application Section
Erase Application Section Page
Write Application Section Page
Erase & Write Application Section Page
Erase Boot Loader Section Page
Write Boot Loader Section Page
Erase & Write Boot Loader Section Page
Read User Signature Row
Erase User Signature Row
Write User Signature Row
Read Calibration Row
Trigger
-/(E)LPM
SPM
CMDEX
SPM
SPM
SPM
SPM
SPM
SPM
SPM
SPM
SPM
SPM
LPM
SPM
SPM
LPM
CPU
Halted
N/Y
N/Y
N/Y
-/N
N
N
Y
N
N
N
Y
Y
Y
N
Y
Y
N
(2)
(2)
(2)
NVM
Busy
N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
Y
Y
N
Change
Protected
-/N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
Y
Y
N
Address
pointer
-/ Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
Z-pointer
XMEGA D
-
-
Data
register
R1:R0
-/Rd
Rd
Rd
-
-
-
-
-
-
-
-
-
-
-
-
-
280

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