ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 92
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATxmega32D4
Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega32D4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega32D4-AU
Manufacturer:
Atmel
Quantity:
123
Part Number:
ATxmega32D4-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega32D4-CU
Manufacturer:
Maxim
Quantity:
71
Company:
Part Number:
ATxmega32D4-MH
Manufacturer:
Atmel
Quantity:
1 910
Company:
Part Number:
ATxmega32D4-MH
Manufacturer:
Atmel
Quantity:
1 704
Part Number:
ATxmega32D4-MH
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
9.7.2
8210B–AVR–04/10
WINCTRL – Window Mode Control Register
• Bit 1 - ENABLE: Watchdog Enable
This bit enables the WDT.
In order to change this bit the CEN bit in
must be written to one at the same time. This bit is protected by the Configuration Change Pro-
tection mechanism, for detailed description refer to
12.
• Bit 0 - CEN: Watchdog Change Enable
This bit enables the possibility to change the configuration of the
trol Register” on page
one at the same time for the changes to take effect. This bit is protected by the Configuration
Change Protection mechanism, for detailed description refer to
tion” on page
• Bits 7:6 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bits 5:2 - WPER[3:0]: Watchdog Window Mode Timeout Period
These bits determine the closed window period as a number of 1 kHz ULP oscillator cycles in
window mode operation. The typical different closed window periods are found in
initial values of these bits are set by the Watchdog Window Timeout Period (WDWP) fuses, and
will be loaded at power-on. In normal mode these bits are not in use.
In order to change these bits the WCEN bit must be written to one at the same time. These bits
are protected by the Configuration Change Protection mechanism, for detailed description refer
to
Table 9-2.
Bit
+0x01
Read/Write
(unlocked)
Read/Write
(locked)
Initial Value
(x = fuse)
”Configuration Change Protection” on page
WPER[3:0]
0000
0001
0010
0011
0100
0101
12.
R
R
Watchdog closed window periods
7
–
0
91. When writing a new value to this register, this bit must be written to
R
R
6
–
0
Group Configuration
R/W
R
X
125CLK
250CLK
5
16CLK
32CLK
64CLK
8CLK
”CTRL – Watchdog Timer Control Register” on page 91
R/W
R
4
X
WPER[3:0]
12.
R/W
”Configuration Change Protection” on page
R
X
3
R/W
Typical closed window periods
2
R
X
”CTRL – Watchdog Timer Con-
”Configuration Change Protec-
WEN
R/W
R/W
X
1
0.125 s
16 ms
32 ms
64 ms
0.25 s
8 ms
XMEGA D
WCEN
R/W
R/W
Table
0
0
9-2. The
WINCTRL
92