MSC8101DS Motorola / Freescale Semiconductor, MSC8101DS Datasheet - Page 24

• Manufacturer Part Number: MSC8101DS
• Description: MSC8101 Network Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

1.6
The MSC8101 Communications Processor Module (CPM) supports a subset of signals included in the
MPC8260. The following sections describe the functionality of the signals in the MSC8101.
The MSC8101 CPM includes the following set of communication controllers:
1-18
Communications Processor Module (CPM) Ports
Two full-duplex Fast Serial Communications Controllers (FCCs) that support:
— Asynchronous Transfer Mode (ATM) through a UTOPIA 8 interface (FCC1 only)—The
— IEEE 802.3/Fast Ethernet through a Media-Independent Interface (MII)
— High-Level Data Link Control (HDLC) Protocol:
— Transparent mode serial operation
One FCC that operates with the TSA only
Two Multi-Channel Controllers (MCCs) that together can handle up to 256 HDLC/transparent
channels at 64 Kbps each, multiplexed on up to four TDM interfaces
Two full-duplex serial communications controllers (SCCs) that support the following protocols:
— IEEE 802.3/Fast Ethernet through a Media-Independent Interface (MII)
— HDLC Protocol:
— Synchronous Data Link Control (SDLC)
— LocalTalk (HDLC-based local area network protocol)
— Universal Asynchronous Receiver/Transmitter (UART)
— Synchronous UART (1x clock mode)
— Binary Synchronous (BISYNC) communication
— Transparent mode serial operation
Two additional SCCs that operate with the TSA only
Two full-duplex Serial Management Controllers (SMCs) that support the following protocols:
— General Circuit Interface (GCI)/Integrated Services Digital Network (ISDN) monitor and C/I
— UART
— Transparent mode serial operation
Serial Peripheral Interface (SPI) support for master or slave operation
Inter-Integrated Circuit (I
MSC8101 can operate as one of the following:
— UTOPIA slave device
— UTOPIA multi-PHY master device using direct polling for up to 4 PHY devices
— UTOPIA multi-PHY master device using multiplex polling that can address up to 31 PHY
— Serial mode—Transfers data one bit at a time
— Nibble mode—Transfers data four bits at a time
— Serial mode—Transfers data one bit at a time
— Nibble mode—Transfers data four bits at a time
channels (TSA only)
devices at addresses 0–30 (address 31 is reserved as a null port).
2
C) bus controller
MSC8101 Technical Data