MSC8101DS Motorola / Freescale Semiconductor, MSC8101DS Datasheet - Page 72

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MSC8101DS

Manufacturer Part Number
MSC8101DS
Description
MSC8101 Network Digital Signal Processor
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
2.5.4
2-18
HDI16 Signals
Number
42
43
44
45
46
47
48
49
50
51
52
53
54
HDI16 Signals
Read data strobe assertion width
HACK read assertion width
Read data strobe deassertion width
HACK read deassertion width
Read data strobe deassertion width
Register” reads
ICR, or ISR reads
HACK deassertion width after “Last Data Register”
reads
Write data strobe assertion width
HACK write assertion width
Write data strobe deassertion width
HACK write deassertion width after ICR, CVR and Data
Register writes
Host data input setup time before write data strobe
deassertion
Host data input setup time before HACK write
deassertion
Host data input hold time after write data strobe
deassertion
Host data input hold time after HACK write deassertion
Read data strobe assertion to output data active from
high impedance
HACK read assertion to output data active from high
impedance
Read data strobe assertion to output data valid
HACK read assertion to output data valid
Read data strobe deassertion to output data high
impedance
HACK read deassertion to output data high impedance
Output data hold time after read data strobe
deassertion
Output data hold time after HACK read deassertion
HCS[1–2] assertion to read data strobe deassertion
HCS[1–2] assertion to write data strobe deassertion
5,6
4
8
8
4
5
5,6
4
7
, or between two consecutive CVR,
Table 2-16. Host Interface (HDI16) Timing
Characteristics
MSC8101 Technical Data
8
4
3
8
4
4
after “Last Data
4
4
8
(2.5
(2.5
(1.5
Expression
T
T
T
T
T
1, 2
C
C
C
C
C
T
T
T
+ 3.3
+ 3.3
+ 3.3
+ 3.3
+ 3.3
C
C
C
) + 3.3
) + 3.3
) + 3.3
11.6
11.6
Min
6.6
6.6
6.6
3.3
3.3
3.3
3.3
6.6
6.6
8.25
Max
3.3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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