MSC8101DS Motorola / Freescale Semiconductor, MSC8101DS Datasheet - Page 71

• Manufacturer Part Number: MSC8101DS
• Description: MSC8101 Network Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

2.5.3.2 DMA Data Transfers
Table 2-15 describes the DMA signals.
The
of CLKIN. To achieve fast response, a synchronized peripheral should assert DREQ according to the timings
in Table 2-15. Figure 2-6 shows synchronous peripheral interaction.
Number
DREQ signal is synchronized with the falling edge of CLKIN. DONE timing is relative to the rising edge
36
37
38
39
40
DREQ setup time before CLKIN falling edge
DREQ hold time after CLKIN falling edge
DONE setup time before CLKIN rising edge
DONE hold time after CLKIN rising edge
DACK/DRACK/DONE delay after CLKIN rising edge
DACK/DONE/DRACK Outputs
Characteristic
DONE Input
MSC8101 Technical Data
Table 2-15. DMA Signals
Figure 2-6. DMA Signals
CLKIN
DREQ
38
40
36
PowerPC System Bus Access Timing
39
Minimum
0.5
0.5
0.5
6
9
Maximum
37
—
—
—
—
9
Units
ns
ns
ns
ns
ns
2-17