AN1836-AN21161 Analog Devices, AN1836-AN21161 Datasheet - Page 16

• Manufacturer Part Number: AN1836-AN21161
• Description: Interfacing the ADSP-21161 SIMD SHARC DSP to the AD1836 (24-bit/96 kHz) Multichannel Codec
• Manufacturer: Analog Devices

3. Configuring The ADSP-21161 Serial Port Multichannel Interface
When interfacing the AD1836 codec to an ADSP-21161 SHARC processor, the interconnection between the 2 devices can be
through either SPORT0/2 or SPORT1/3 TDM pairs. In the application code section of this document, SPORT0 and SPORT2
are used in the example drivers since the 21161 EZ-KIT Lite makes use of the SPORT0/2 TDM pairing for the codec interface.
Both the DSP and codec serial port shift data MSB first, and the AD1836’s ABCLK frequency of 12.288 MHz is less than the
SCLK maximum of 50 MHz for the ADSP-21161. Therefore, the DSP’s CCLK (core clock) frequency must be greater than
12.288 MHz.
The ADSP-21161 Serial Ports have two data pins per SPORT, which can be configured either for transmitting or receiving
data. These pins are bi-directional and are programmable by setting or clearing the DDIR (data direction) bit in SPCTL.
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Figure 17. ADSP-21161 SPORT Pin Fixed Functionality in Multichannel Mode
A Channels - D0A, D1A, D2A, D3A
B Channels - D0B, D1B, D2B, D3B
SPORT0 - SPORT2, SPORT1 - SPORT3 pairs
Figure 16. ADSP-21161 SPORTs Pins
D0a
D0b
FS0
SCLK0
D1a
D1b
FS1
SCLK1
D0a
D0b
FS0
SCLK0
D1a
D1b
FS1
SCLK1
SPORT0
SPORT1
SPORT0
SPORT1
a
a
a
a
a
a
a
a
SPORT2
SPORT3
SPORT2
SPORT3
SCLK2
SCLK3
SCLK2
SCLK3
TDV2
TDV3
D2b
D2b
D2a
FS2
D3a
D3b
FS3
D2a
D3a
D3b