AN1836-AN21161 Analog Devices, AN1836-AN21161 Datasheet - Page 26

• Manufacturer Part Number: AN1836-AN21161
• Description: Interfacing the ADSP-21161 SIMD SHARC DSP to the AD1836 (24-bit/96 kHz) Multichannel Codec
• Manufacturer: Analog Devices

.var
.var
.endseg;
.segment
/*----------------------------------------------------------------------------------*/
/*
/*----------------------------------------------------------------------------------*/
Program_SPORT02_DMA_Channels:
.endseg;
rcv0a_tcb[8]
xmit2a_tcb[8] = 0, 0, 0, 0, 0, 8, 1, tx2a_buf;
r1
/* sport2 dma control tx setup and go
r0
r0
r0
dm(xmit2a_tcb + 4) = r0;
dm(CP2A) = r0;
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
/* - Note: Tshift2 & TX2A will be automatically loaded with the first 2 values in the
/* - Tx buffer. The TX buffer pointer ( II2A ) will increment by 2x the modify value
/* - ( IM2A ).
/* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
/* sport0 dma control rx setup and go */
r0
r0
r0
dm(rcv0a_tcb + 4) = r0;
dm(CP0A) = r0;
RTS;
/pm
= 0x0003FFFF;
= xmit2a_tcb + 7;
=
=
= rcv0a_tcb + 7;
=
=
DMA Controller Programming For SPORT0 and SPORT2 primary A channels
r1 AND
BSET r0 BY
r1 AND
BSET r0 BY
Emx (destination buffer step size),
Eix (destination buffer index (initialized to start address)),
GPx ("general purpose"),
CPx ("Chain Point register"; points to last address (IIx) of
Cx
IMx (source buffer step size),
IIx (source buffer index (initialized to start address))
pm_code;
(length of source buffer),
r0;
r0;
= 0, 0, 0, 0, 0, 8, 1, rx0a_buf;
18;
18;
next TCB to jump to upon completion of this TCB.),
/* cpx register mask */
/* get DMA chaining internal mem pointer containing tx_buf address */
/* mask the pointer */
/*(Address will be contained in lower 18 bits (bits 17-0);
/* set the pci bit */
/* write DMA transmit block chain pointer to TCB buffer */
/* transmit block chain pointer, initiate tx0 DMA transfers */
/* mask the pointer */
/* set the pci bit */
/* write DMA receive block chain pointer to TCB buffer*/
/* receive block chain pointer, initiate rx0 DMA transfers */
Upper 13 bits will be zeroed (bits 19-31);
Bit 19 is PCI bit ("Program-Controlled Interrupts") */
*/
/* SPORT0 receive tcb */
/* SPORT2 transmit tcb */
*/
*/
- */
- */
- */